Senior PCB Design Engineer

GCS Recruitment; San Francisco (CA); On-site; USD 140,000 - 200,000; Full time

Job summary

GCS Recruitment in San Francisco, CA seeks a Senior PCB Design Engineer to lead hardware bring-up, debugging, and verification for advanced satellite payload hardware. This on-site, 12+ month contract role emphasizes hands-on lab work, high-speed interfaces, and robust PCB design.

You will collaborate with hardware and RF/antenna teams, execute design verification campaigns, and contribute to next-generation board revisions through root-cause analysis and meticulous documentation.

Qualifications

• 8+ years of electrical engineering experience in board-level hardware design.
• Strong schematic capture and dense multilayer PCB design experience.
• Expertise in power delivery, distribution, and sequencing.
• Hands-on lab experience with board bring-up and validation.
• Proficiency with high-end measurement equipment.
• Experience with high-speed SerDes technologies.
• Full hardware lifecycle experience from design to manufacturing.
• Degree: BSEE or MSEE or equivalent.

Responsibilities

• Lead bring-up of newly fabricated circuit boards, including power-on and first-time hardware debug through root cause.
• Plan and execute design verification and validation campaigns with high-speed link testing and power measurements.
• Collaborate with hardware design engineers to drive corrective actions into revisions.
• Contribute to schematic capture and PCB layout for next-generation hardware.
• Support RF and antenna engineering teams with validated hardware.
• Troubleshoot board-level hardware issues using laboratory instrumentation.
• Support the complete hardware development lifecycle from design to manufacturing.

Skills

Board-level hardware design

Schematic capture

Power delivery sequencing

Hardware bring-up & debugging

High-speed interfaces (JESD204, PCIe,

Signal integrity / power integrity

Full hardware lifecycle experience

Education

BSEE or MSEE or equivalent

Tools

Oscilloscopes

Logic analyzers

High-speed test equipment

PCB layout tools

Job description

Senior PCB Design Engineer

Location: San Francisco, California

Contract: 12+ months
Work Arrangement: 5 days onsite

About the Role

We are seeking a Senior PCB Hardware Design Engineer / Senior Hardware Development Engineer to support the development of advanced satellite payload hardware. This is a hands‑on role focused heavily on board bring‑up, hardware debug, design verification, validation, and supporting the transition of validated designs into subsequent hardware revisions.

The ideal candidate will have strong board‑level design experience combined with extensive laboratory expertise and the ability to troubleshoot complex hardware issues from initial power‑on through root‑cause identification and resolution.

Responsibilities

• Lead bring‑up of newly fabricated circuit boards, including power‑on, section‑by‑section checkout, and first‑time hardware debug through root cause.
• Plan and execute design verification and validation campaigns, including high‑speed link testing, power measurements, functional testing, and detailed documentation of results.
• Partner closely with hardware design engineers to identify issues and drive corrective actions into subsequent board revisions.
• Contribute to schematic capture and PCB layout activities for next‑generation hardware as project priorities and bandwidth allow.
• Support RF and antenna engineering teams with validated hardware and assist with their measurement and characterization requirements.
• Troubleshoot board‑level hardware issues using systematic debug methodologies and laboratory instrumentation.
• Support the complete hardware development lifecycle from design and fabrication through bring‑up, validation, and manufacturing support.

Required Qualifications

• 8+ years of electrical engineering experience in board‑level hardware design.
• Strong experience with schematic capture and complex, dense multilayer PCB designs.
• Solid understanding of power delivery, power distribution, and sequencing.
• Extensive hands‑on laboratory experience with board bring‑up, hardware debug, and validation.
• Proficiency with oscilloscopes, logic/protocol analyzers, and high‑speed test and measurement equipment.
• Experience with high‑speed digital interfaces and multi‑gigabit SerDes technologies such as JESD204, PCIe, 25G+ Ethernet, DDR, or similar.
• Strong understanding of signal integrity and power integrity considerations.
• Demonstrated experience across the full hardware lifecycle: design → build → bring‑up → validation → manufacturing support.
• BSEE, MSEE, or equivalent practical engineering experience.