Senior Mask Design Engineer Interposer Layout Cadence Equity

NVIDIA; California (MO); On-site; USD 136,000 - 259,000; Full time

Job summary

NVIDIA is seeking a Senior Mask Design Engineer to advance silicon interposer layout and package design for NVIDIA products. You will collaborate with the package technical lead and design teams to create sophisticated layouts and meet tight schedules.

Role requires 5+ years in mask/layout, deep CMOS layout knowledge, and Cadence Virtuoso expertise. You will contribute to feasibility studies, floorplanning, and implementation trade-offs with strong teamwork and communication.

Qualifications

• Hold a B.S. Electrical Engineering or equivalent experience.
• Minimum of 5+ years proven experience in Mask and Layout Design.
• Deep understanding of layout concepts in submicron CMOS technologies.
• Cadence layout tools - Virtuoso proficiency.
• Knowledge of Integrity auto-routing is a plus.
• Experience with Calibre, ICV, Thunder for verification.
• Proficient in scripting languages such as Perl, Python, Skill.
• Knowledge of DRC and LVS checking flows and customizing decks.
• Knowledge of APD package layout tool is a plus.
• Good understanding of packaging technology and teamwork.

Responsibilities

• Collaborate cross functionally with PTL and I/O signal integrity and technology engineers to deliver solutions for product packages on tight schedules.
• Perform physical layout for silicon interposer using Cadence tools.
• Conduct design feasibility studies to evaluate package design goals for size, cost, and system performance.
• Study layout floorplans and perform custom layout and verification against design rules and netlists.
• Propose layout design trade-offs to the PTL for resolution and implementation.

Skills

Cadence Virtuoso

DRC LVS

Python scripting

Calibre

Education

B.S. Electrical Engineering

Tools

Calibre

ICV

Thunder

APD package layout tool

Job description

NVIDIA is seeking a Senior Mask Design Engineer to advance silicon interposer layout and package design for NVIDIA products. You will collaborate with the package technical lead and design teams to create sophisticated layouts and meet tight schedules.

Role requires 5+ years in mask/layout, deep CMOS layout knowledge, and Cadence Virtuoso expertise. You will contribute to feasibility studies, floorplanning, and implementation trade-offs with strong teamwork and communication.