Senior Mask Design Engineer - Hardware

NVIDIA Corporation; Santa Clara (CA); On-site; USD 132,000 - 207,000; Full time

Job summary

NVIDIA Corporation in Santa Clara, CA is seeking a Senior Mask Layout Design Engineer to join a high-speed mixed-signal team. You will perform physical layout for analog/digital blocks and work with ASIC/mixed-signal engineers to enable sub-micron CMOS designs.

Responsibilities include floor planning, custom layout, and verification against design rules and schematics using Cadence tools; you will contribute to VLSI integration and process technology efforts.

Qualifications

• BSEE or equivalent experience and 8+ years in the industry.
• Deep understanding of analog layout concepts in submicron CMOS.
• Proficiency with Cadence custom tools and knowledge of DRC/LVS flows.
• Experience with verification tools such as Dracula, Hercules, Calibre, and PrimeYield.
• Proficient in scripting languages like Perl and Python.

Responsibilities

• Perform physical layout for mixed-signal functions like PLLs, high-speed SerDes, and ADCs using Cadence tools.
• Collaborate with ASIC and mixed-signal engineers to customize designs for VLSI product integration.
• Participate in floor planning, custom layout, and verification against design rules and schematics.

Skills

Analog layout concepts

Cadence tools

Scripting: Perl/Python

DRC/LVS flows

Team collaboration

Education

BSEE or equivalent

Tools

Cadence

Dracula

Hercules

Calibre

PrimeYield

Job description

Senior Mask Design Engineer - Hardware page is loaded## Senior Mask Design Engineer - Hardwarelocations: US, CA, Santa Claratime type: Full timeposted on: Posted Todayjob requisition id: JR2016584We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and multifaceted group of diverse individuals responsible for handling meaningful high-speed mixed-signal circuit designs. NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to take on, that only we can pursue, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence. We would love to hear from you!**What you'll be doing:*** Performing physical layout for mixed-signal functions like PLL's, high speed SerDes, Analog to Digital converters, ESD structures designs in innovative sub-micron CMOS technologies using Cadence tools.* You'll work multi-functional with ASIC and mixed-signal engineers to customize designs for integration in VLSI products.* Take part in floor planning, custom layout and verifying against design rules and schematics.**What we need to see:*** Have a BSEE or equivalent experience and minimum of 8+ years industry experience.* Deep understanding of analog circuit layout concepts in submicron CMOS technologies.* You are an authority with Cadence custom circuit design tools* Experience running and debugging with verification tools such as Dracula, Hercules, Calibre, and Primeyield.* You are able to work optimally in a team, good interpersonal skills, passion and positive energy.* Proficient in scripting languages like perl, python, skill etc.* Should have knowledge of DRC and LVS checking flows, ability to customize decks.Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 132,000 USD - 207,000 USD.You will also be eligible for equity and .Applications for this job will be accepted at least until May 9, 2026.This posting is for an existing vacancy.NVIDIA uses AI tools in its recruiting processes.NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.