Senior IC Design Engineer – RTL to Tape-out (Onsite CO)

Broadcom Inc.; Colorado Springs (CO); On-site; USD 120,000 - 180,000; Full time

Benefits offered by this job

Medical, dental and vision plans

401(k) with company match

Employee Stock Purchase Program

Paid holidays, sick leave and vacation

Job summary

Broadcom Inc. is seeking an IC Design Engineer (ICB4) to join the Data Center Solutions Group at our Colorado Springs campus. The role focuses on physical IC design, RTL synthesis, and timing closure for PCIe switch products and enterprise storage solutions.

You will work hands-on in a full design cycle from RTL to tape-out at in-person site. The ideal candidate has 8+ years in physical design, strong scripting (TCL/Perl), and deep experience with top-level floorplanning, clock trees, and STA

Qualifications

• Bachelor’s degree in Electrical Engineering or Electronics Engineering required.
• 8+ years of relevant experience.
• Strong scripting in TCL and PERL.
• Proficient with physical design tools and flow.
• Experience RTL to Tape-out and timing closure.

Responsibilities

• Execute Physical Design, Synthesis, Physical Verification, and Timing Closure.
• Set up and Synthesize RTL.
• Achieve timing closure using STA techniques.
• Perform EM/IR analysis, Place and Route, Clock Tree Synthesis.
• Floor-planning and layout, top-level design responsibilities.
• Collaborate with IC Design RTL Engineers.

Skills

TCL scripting

PERL scripting

Excellent communication

RTL to Tape-out

EDA tools proficiency

Education

Bachelor’s degree in Electrical Engineering or Electronics Engineering

Tools

EDA Tools

Job description

Broadcom Inc. is seeking an IC Design Engineer (ICB4) to join the Data Center Solutions Group at our Colorado Springs campus. The role focuses on physical IC design, RTL synthesis, and timing closure for PCIe switch products and enterprise storage solutions.

You will work hands-on in a full design cycle from RTL to tape-out at in-person site. The ideal candidate has 8+ years in physical design, strong scripting (TCL/Perl), and deep experience with top-level floorplanning, clock trees, and STA