Senior Hardware Validation Engineer, Datacenter Systems

NVIDIA Corporation

United States

On-site

USD 168,000 - 259,000

Full time

3 days ago
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Job summary

NVIDIA seeks a Senior Hardware Validation Engineer to lead validation activities in the Datacenter Systems Engineering team. You will collaborate with validation engineers, board designers, silicon characterization, and AE teams to ensure robust product validation and test coverage.

The ideal candidate has strong lab skills, scripting ability, and a passion for product-level validation in a fast-paced environment.

Qualifications

  • BSEE/BSCE or equivalent experience.
  • 5+ years of validation experience.
  • Strong Linux experience with Python, Shell, or Perl.
  • Experience with ARM CPU architecture and hardware validation.

Responsibilities

  • Own validation coverage, risk, and release-readiness from bring-up to production.
  • Debug complex electrical, functional, performance, and reliability issues; define experiments and establish regression coverage.
  • Validate power delivery and power-management control loops; verify interfaces (PCIe, I2C, SPI, SMBus, USB).
  • Lead cross-functional investigations with board, silicon, firmware, thermal, mechanical, and manufacturing teams to closure.
  • Review schematics/PCBs and provide actionable design feedback for next-gen products.
  • Develop diagnostics, automation, and data-analysis tools to improve coverage and root-cause efficiency.

Skills

Digital design
Circuit analysis
CPU/GPU architecture
Lab automation
Python scripting
Linux

Education

BSEE/BSCE or equivalent

Tools

Oscilloscopes
Multimeters
Logic analyzers

Job description

NVIDIA seeks a Senior Hardware Validation Engineer to lead validation activities in the Datacenter Systems Engineering team. You will collaborate with validation engineers, board designers, silicon characterization, and AE teams to ensure robust product validation and test coverage.

The ideal candidate has strong lab skills, scripting ability, and a passion for product-level validation in a fast-paced environment.

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