Senior GPU-Accelerated Cloud Hardware Architect

Amazon Inc.; Seattle (WA); On-site; USD 159,000 - 215,000; Full time

Benefits offered by this job

Sign-on bonuses and RSUs

Comprehensive benefits

Job summary

Amazon Web Services, Inc. in Seattle seeks a Cloud Hardware Development Engineer to define server architectures for AI training at scale, translate workloads into detailed specifications, and drive validation from PCBA bring-up through rack integration.

You will coordinate with ODM/JDM partners and own fleet quality metrics post-launch. You will lead end-to-end hardware designs across thermal, mechanical, power, and signal integrity, review schematics, triage failures, mentor engineers, and

Qualifications

• 7+ years of equivalent experience.
• Experience in developing functional specifications, design verification plans and functional test procedures.
• Experience in server technologies such as, thermal, mechanical, power, and signal integrity.
• Bachelor's degree or above in electrical engineering, computer engineering, or equivalent.
• 5+ years of Design/Innovation, research & development, manufacturing, process, industrial engineering, or related experience.
• Experience leading process improvement, systems development, and project management.
• Experience in English-language communication skills, both written and verbal.
• In depth expertise in one or more server technologies such as Thermal / Mechanical design, high speed bus design and signal integrity, failure analysis, server components (e.g. CPU, GPU, SSDs, memory), BIOS, BMC, and networking

Responsibilities

• Define server architectures based on workload demand and customer requirements, translating them into detailed designs and component specifications that enable high-performance AI training and inference at scale.
• Work with interdisciplinary teams of component, firmware, test, qualification, and integration engineers to deliver cohesive designs.
• Drive design reviews with ODM/JDM partners covering schematic, layout, BOM, and manufacturing DFx (Design for Test, Design for Manufacturing).
• Define and execute validation strategies from PCBA bring-up through server and rack integration — covering power sequencing, signal integrity, thermal characterization, and accelerator interconnect performance.
• Own hardware debug during EVT/DVT/PVT builds, correlating failures across PCIe, power rails, memory channels, and GPU subsystems.
• Triage hardware issues at both ODM facilities and datacenters, conduct root cause analysis, and implement corrective actions.
• Own fleet quality metrics post-launch: server-level annualized failure rates and component-level failure modes.
• Monitor operational telemetry to identify systemic issues and drive design or process changes for current and future platforms.
• Partner with test and automation teams to improve manufacturing yield and reduce test dwell times.
• Work with EC2 architecture teams to align on instance definitions, workload requirements, and platform trade-offs.
• Drive ODM/JDM design partners through development milestones and production ramp.
• Collaborate with firmware, software, and operations teams to ensure designs are debuggable, serviceable, and automation-ready.
• May require occasional (<10%) regional and international travel to Design and Manufacturing Partner sites.

Skills

7+ years experience

English communication

Thermal design

Mechanical design

Signal integrity

Power delivery

Education

Bachelor's degree or above in electrical engineering, computer engineering, or equivalent

Tools

Job description

Amazon Web Services, Inc. in Seattle seeks a Cloud Hardware Development Engineer to define server architectures for AI training at scale, translate workloads into detailed specifications, and drive validation from PCBA bring-up through rack integration.

You will coordinate with ODM/JDM partners and own fleet quality metrics post-launch. You will lead end-to-end hardware designs across thermal, mechanical, power, and signal integrity, review schematics, triage failures, mentor engineers, and