Senior FPGA & SDR Design Engineer — High-Performance RF

Qualis Corporation in; Huntsville (AL); On-site; USD 140,000 - 190,000; Full time

Benefits offered by this job

Health, dental, and vision insurance

401(k) match

Paid time off and Holidays

Educational, professional development,

Tax-saving options

Disability and Life Insurance

Job summary

Qualis LLC is seeking a Senior FPGA/Digital Design Engineer to develop high-performance FPGA solutions for RF and SDR systems in Huntsville, AL. You will work hands-on with AMD/Xilinx devices using Vivado, PetaLinux, Tcl scripting, BSPs, and reference designs to translate system requirements into practical FPGA implementations.

The role involves integrating vendor and custom designs, supporting SDR, EW, sensing, and PNT technologies, and collaborating with RF, software, systems, and hardware

Qualifications

• ABET-accredited Bachelor's degree in Electrical/Computer Engineering or related field.
• 8+ years FPGA-based systems experience.
• Hands-on AMD/Xilinx FPGA devices and Vivado experience.
• Proficiency in VHDL and/or Verilog; SystemVerilog a plus.
• Experience with FPGA reference designs, IP cores, BSPs, and high-speed interfaces.
• Experience scripting with Tcl for Vivado projects.
• Experience with PetaLinux/Vitis and embedded Linux for FPGA systems.
• US citizenship and ability to obtain clearance.

Responsibilities

• Design, develop, integrate, and test FPGA-based processing for RF and SDR.
• Develop FPGA designs using VHDL/Verilog/SystemVerilog in Vivado.
• Optimize real-time DSP functions and data movement architectures.
• Integrate AMD/Xilinx reference designs, IP cores, BSPs, and platforms.
• Create Tcl scripts to automate Vivado workflows.
• Develop embedded Linux solutions with PetaLinux; device trees and BSPs.
• Configure and validate high-speed FPGA interfaces (PCIe, JESD204, Ethernet).
• Support board bring-up, FPGA debugging, timing closure, and lab validation.
• Collaborate with RF, software, systems, hardware engineers on integrated solutions.
• Contribute to roadmaps for SDR, EW, sensing, communications, and PNT.

Skills

AMD/Xilinx FPGA

Vivado

VHDL/Verilog

SystemVerilog

PetaLinux

Tcl scripting

Embedded Linux

IP cores

Board support packages

RFSoC

PCIe

Ethernet

JESD204

AXI

Education

ABET-accredited EE/CE/Physics degree

Tools

Vivado

PetaLinux

Vitis

ModelSim/Questa

Job description

Qualis LLC is seeking a Senior FPGA/Digital Design Engineer to develop high-performance FPGA solutions for RF and SDR systems in Huntsville, AL. You will work hands-on with AMD/Xilinx devices using Vivado, PetaLinux, Tcl scripting, BSPs, and reference designs to translate system requirements into practical FPGA implementations.

The role involves integrating vendor and custom designs, supporting SDR, EW, sensing, and PNT technologies, and collaborating with RF, software, systems, and hardware