Senior FPGA / RTL Design Engineer - Signal Processing

Motorola Solutions

Los Angeles (CA)

On-site

USD 125,000 - 195,000

Full time

14 days+

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Benefits offered by this job

Bonus plans
Medical, Dental, Vision
401(k) with company match
Paid holidays
Generous paid time off
Employee stock purchase plan
Parental & family leave

Job summary

Motorola Solutions, via its Silvus Technologies subsidiary, seeks a Senior FPGA Design Engineer focused on signal processing in a West Los Angeles setting. Hybrid role requiring at least three onsite days per week.

The engineer will drive RTL development, DSP, and fixed-point implementations for high-performance wireless projects. Ideal candidates have 6+ years FPGA experience (or 4 with a Master, 2 with a PhD), Xilinx/Vivado expertise, and the ability to work across clock domains with strong

Qualifications

  • Bachelor degree in Electrical Engineering or related field.
  • Minimum 6 years FPGA design experience or 4 years with a Master’s or 2 with a Ph.D.
  • Experience with fixed-point arithmetic and DSP designs.
  • Proven high-utilization, multi clock-domain FPGA designs.
  • Experience with Xilinx FPGAs/SoCs and Vivado IDE.
  • U.S. Person status required and background/drug screening completed.

Responsibilities

  • Architect digital designs for wireless/communication projects.
  • Develop RTL code, simulate, and build test benches.
  • Perform FPGA synthesis and timing closure.
  • Verify hardware and troubleshoot with lab gear.
  • Support RF and software engineering teams.

Skills

FPGA design
Fixed-point DSP
Clock-domain design
Xilinx FPGAs & Vivado

Education

Bachelor of Science in Electrical Engineering

Tools

Xilinx Vivado
MATLAB

Job description

Senior FPGA Design Engineer - Signal Processing

This role is located at Silvus Technologies, a subsidiary of Motorola Solutions, and reports to the Director of FPGA Engineering. The position is based in West Los Angeles, CA, with a hybrid schedule requiring a minimum of three onsite days per week (Mondays, Wednesdays, Thursdays).

Responsibilities
  • Digital design architecting for wireless communication projects.
  • Fixed point design of signal processing blocks in collaboration with systems engineers.
  • RTL coding, simulation, and test bench development.
  • FPGA synthesis and timing closure.
  • Hardware verification and troubleshooting; familiarity with logic analyzers.
  • Provide support to the RF and Software Engineering teams.
  • Perform other related duties as needed.
Required Qualifications
  • Bachelor of Science degree in Electrical Engineering, Computer Science, or related field.
  • Minimum 6 years of demonstrated FPGA design experience; alternatively 4 years with a Master’s degree or 2 years with a Ph.D.
  • Demonstrated experience with fixed‑point binary arithmetic and digital signal processing designs.
  • Proven expertise in multiple clock‑domain, high‑utilization FPGA designs.
  • Experience with Xilinx FPGAs, SoCs, and the Vivado IDE.
  • Must be a U.S. Person (U.S. Citizen or Permanent Resident).
  • Successful clearance of a background check and drug test.
Preferred Qualifications
  • Master of Science in Electrical Engineering (MSEE).
  • Experience using MATLAB.
  • Experience with communication systems on FPGA or ASIC designs.
Working Conditions & Physical Requirements

Office environment. Occasional exposure to heat, cold, and allergens during tests or field demonstrations. Physical activities include lifting equipment up to 20 lbs., bending, reaching, kneeling or squatting, and walking/moving in the labs.

Compensation & Benefits
  • Salary: $125,000 – $195,000 per annum.
  • Incentive Bonus Plans.
  • Medical, Dental, Vision benefits.
  • 401(k) with Company Match.
  • 10 paid holidays.
  • Generous paid time off packages.
  • Employee Stock Purchase Plan.
  • Paid parental & family leave.
Travel Requirements

Under 10% travel. Domestic position.

EEO Statement

Motorola Solutions is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion or belief, sex, sexual orientation, gender identity, national origin, disability, veteran status or any other legally-protected characteristic.

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