Senior FPGA Engineer – Quantum Control Systems

QuEra Computing, Inc.; Boston (MA); On-site; USD 140,000 - 200,000; Full time

Benefits offered by this job

Equity grants

Job summary

QuEra Computing, Inc. seeks a Senior FPGA Engineer to design, implement, and optimize high-performance FPGA systems for real-time quantum control. You will work on quantum gate timing, high-speed data paths, and scalable control architectures in a fast-paced hardware team.

Responsibilities include developing SystemVerilog modules, RF gating waveforms, ADC/DAC interfaces, and hardware-accelerated image processing, with emphasis on timing precision and reliability for quantum experiments.

Qualifications

• 5+ years FPGA development experience with complex, real-time systems.
• Expert-level SystemVerilog with modern verification methodologies.
• Experience with high-speed serial protocols (Aurora, AXI4, PCIe, Ethernet).
• Real-time systems design with microsecond timing requirements.
• Clock domain crossing design and verification.
• Python programming for test automation and data analysis.

Responsibilities

• Design and implement SystemVerilog modules for quantum control systems.
• Develop multitone RF generators for quantum gates and high-speed ADC/DAC interfaces.
• Implement hardware-accelerated image processing for atom detection.
• Maintain Ulti-board FPGA designs (Xilinx Zynq UltraScale+ RFSoC).
• Implement high-speed serial interfaces (CoaXPress, Aurora, AXI4-Stream).
• Ensure timing closure and CDC verification across multi-domain systems.

Skills

SystemVerilog

FPGA development

Real-time systems

Python

Clock domain crossing

Education

Bachelor's or Master's in Electrical/Computer Engineering or Physics

Tools

Vivado

RFSoC platforms

UVM

co-simulation (cocotb)

Job description

QuEra Computing, Inc. seeks a Senior FPGA Engineer to design, implement, and optimize high-performance FPGA systems for real-time quantum control. You will work on quantum gate timing, high-speed data paths, and scalable control architectures in a fast-paced hardware team.

Responsibilities include developing SystemVerilog modules, RF gating waveforms, ADC/DAC interfaces, and hardware-accelerated image processing, with emphasis on timing precision and reliability for quantum experiments.