Senior FPGA Engineer – Imaging & Vision Systems

alcon; Goleta (CA); On-site; USD 131,000 - 169,000; Full time

Benefits offered by this job

Health insurance

Retirement plan

Paid time off

Job summary

Alcon is seeking a Principal FPGA Engineer II to lead FPGA/embedded development in Goleta, CA. You will design FPGA logic (VHDL/Verilog), develop image processing pipelines, and interface with sensors and DDR memory while mentoring junior engineers.

You will also oversee timing closure, develop firmware in C/C++/Python, and collaborate with EE and software teams in an Agile environment. Relocation and visa sponsorship are supported.

Qualifications

• Bachelor’s Degree or Equivalent years of directly related experience (or high school +13 yrs; Assoc.+9 yrs; M.S.+2 yrs; PhD+0 yrs)
• The ability to fluently read, write, understand and communicate in English
• 5 Years of Relevant Experience
• Relocation and Visa Sponsorship: Yes

Responsibilities

• Designing FPGA logic using VHDL or Verilog and writing testbenches for functional simulation
• Writing timing constraints to close timing on FPGA designs
• Developing image processing pipeline on FPGA to interface with DDR memories
• Interfacing FPGA to external hardware peripherals (sensors, memories, etc)
• Programming embedded processors using C language
• Organizing weekly stand-up meetings and acting as technical lead
• Testing embedded systems with UART/RS-232, J-tag, oscilloscopes and logic analyzers
• Developing firmware using Agile Design Methodology and performing code reviews
• Creating detailed design documentation
• Maintaining automated FPGA build/test platforms with scripts
• Creating host tools/scripts in C/C++ or Python to test embedded systems
• Reviewing FPGA board schematics with EE team
• Collaborating with software for HW interfacing
• Mentoring junior FPGA engineers
• Interacting with other departments and external vendors

Skills

FPGA design

DDR memory interfacing

Finite-state machine architectures

Timing optimization

VHDL

Verilog

C/C++

Python

FPGA debugging

Education

Bachelor’s Degree or Equivalent in related field

Tools

Xilinx ISE/Vivado

Intel Quartus

Microchip LiberoSoC

ModelSim/Questa

Job description

Alcon is seeking a Principal FPGA Engineer II to lead FPGA/embedded development in Goleta, CA. You will design FPGA logic (VHDL/Verilog), develop image processing pipelines, and interface with sensors and DDR memory while mentoring junior engineers.

You will also oversee timing closure, develop firmware in C/C++/Python, and collaborate with EE and software teams in an Agile environment. Relocation and visa sponsorship are supported.