Senior FPGA Engineer for Space SDR Missions

Argotec S.r.l.; La Mirada (CA); Hybrid; USD 120,000 - 180,000; Full time

Job summary

Argotec S.r.l. in La Mirada, CA is seeking an experienced FPGA Engineer to develop next-generation SDR payloads for space missions.

You will design high-performance FPGA architectures and implement DSP functions for waveform processing in challenging radiation and thermal environments. You will work with system, RF, hardware, and software engineers, using Verilog/SystemVerilog/VHDL and Xilinx Vivado to verify, synthesize, and integrate interfaces such as JESD204, LVDS, Ethernet, and SpaceWire.

Qualifications

• Bachelor’s or Master’s Degree in Electrical Engineering, Computer Engineering, or related fields.
• At least 5+ years of experience in FPGA design and development in a professional or research environment.
• U.S. Citizenship or U.S. Permanent Residency is required.
• Excellent written and oral communication in English.

Responsibilities

• Develop, implement, and maintain FPGA designs using Verilog, SystemVerilog, or VHDL for space SDR systems.
• Design and integrate DSP functions such as filtering, modulation/demodulation, and channelization.
• Implement high-speed digital interfaces and ensure reliable data transfer between FPGA and peripherals.
• Perform simulation, verification, and documentation using QuestaSim and Vivado Simulator.
• Support synthesis, place-and-route, timing closure, constraint development, and timing analysis.
• Integrate FPGA designs with embedded processors, firmware, and software; collaborate across multidisciplinary teams.
• Support hardware bring-up, lab validation, debugging, and system-level testing.
• Analyze and optimize FPGA resource usage, latency, throughput, and power consumption.

Skills

HDL languages

Vivado

JESD204

DSP in FPGA

Fixed-point math

SpaceWire

EDA verification

Git versioning

Education

Bachelor's or Master's in Electrical/Computer Engineering

Tools

QuestaSim

Xilinx Vivado

Job description

Argotec S.r.l. in La Mirada, CA is seeking an experienced FPGA Engineer to develop next-generation SDR payloads for space missions.

You will design high-performance FPGA architectures and implement DSP functions for waveform processing in challenging radiation and thermal environments. You will work with system, RF, hardware, and software engineers, using Verilog/SystemVerilog/VHDL and Xilinx Vivado to verify, synthesize, and integrate interfaces such as JESD204, LVDS, Ethernet, and SpaceWire.