Senior FPGA Engineer

Woven; El Segundo (CA); Hybrid; USD 140,000 - 168,000; Full time

Benefits offered by this job

Stock options

Comprehensive benefits: health, dental

Job summary

CesiumAstro seeks a Senior FPGA Engineer to lead FPGA circuits across all development stages for satellites and aerospace systems. You will design, verify, and deploy HDL implementations with high‑speed interfaces and multiple clock domains, while ensuring rigorous testing and documentation.

The role requires strong communication skills, hands‑on lab experience, and a background in HDL based FPGA work. Equal opportunity employer; offering stock options and a comprehensive benefits package.

Qualifications

• BS or MS in Electrical Engineering or Computer Engineering from an accredited university.
• Minimum of 6 years of industry or university research experience in FPGA systems at the HDL level.
• Expertise in FPGA design and verification (Verilog/VHDL, HDL coder, XilinxVivado, ModelSim, etc.).
• Hands-on experience with lab instruments such as digital oscilloscopes, spectrum analyzers, RF signal generators, and vector signal analyzers.
• Excellent written and verbal communication skills.

Responsibilities

• Design, verify, test, and deploy FPGA circuits and systems through all development phases.
• Work on HDL-level designs including high-speed interfaces, data streams, DSP cores, multiple clocks, and management interfaces.
• Present engineering design reviews to customers and the executive team; contribute to proposal writing.
• Engage in testing, validation, and verification activities; apply DSP or board-level hardware experience as applicable.

Skills

FPGA design

HDL (Verilog/VHDL)

FPGA verification

Xilinx Vivado

ModelSim

DSP techniques

Test & measurement

Education

Bachelor of Science in Electrical Engineering or Computer Engineering

Master of Science in Electrical Engineering or Computer Engineering

Tools

Verilog/VHDL

Vivado

ModelSim

Job description

Please Note: To conform with the United States Government Space Technology Export Regulations, the applicant must be a U.S. citizen, lawful permanent resident of the U.S., conditional resident, asylee or refugee (protected individuals as defined by 8 U.S.C. 1324b(a)(3)), or eligible to obtain the required authorizations from the U.S. Department of State.

At CesiumAstro, we are developers and pioneers of out-of-the-box communication systems for satellites, UAVs, launch vehicles, and other space and airborne platforms. We take pride in our dynamic and cross-functional work environment, which allows us to learn, develop, and engage across our organization. If you are looking for hands‑on, interactive, and autonomous work, CesiumAstro is the place for you. We are actively seeking passionate, collaborative, energetic, and forward‑thinking individuals to join our team.

We are looking to add a Senior FPGA Engineer to our team. If you enjoy working in a startup environment and are passionate about developing leading‑edge hardware for satellites, spacecraft, and aerospace systems, we would like to hear from you.

In this position, you will be responsible for FPGA circuits and systems through all phases of the development process. The ideal candidate will have experience in FPGA design, verification, test, and deployment at the HDL level. FPGA HDL designs will include high‑speed serial interfaces and data streams, digital processing cores, multiple clocks and clock domains, and management interfaces. Testing, validation, and verification will also be central tasks for any FPGA design. Experience in digital signal processing or board‑level hardware design is also desirable.

The successful candidate will present engineering design review materials to our customers and executive team, as well as participate in proposal‑writing efforts. As such, excellent written and verbal communication skills are required.

JOB REQUIREMENTS AND MINIMUM QUALIFICATIONS

• Bachelor of Science (BS) or Master of Science (MS) degree in Electrical Engineering or Computer Engineering from an accredited university or institution.
• Minimum of 6 years of industry or university research experience in the design, analysis, and implementation of FPGA systems at the HDL level.
• Expertise in FPGA design and verification (Verilog/VHDL, HDL coder, Xilinx’s Vivado, Modelsim, etc.).
• Hands-on experience with lab instruments such as digital oscilloscopes, spectrum analyzers, RF signal generators, and vector signal analyzers.
• Excellent written and verbal communication skills.

PREFERRED EXPERIENCE

• Aerospace design and qualification.
• Worst-case analysis, failure method and criticality analyses, and reliability analysis.
• Experience with board‑level hardware design.
• Familiarity with communications systems, such as digital signal processing.

$140,000 - $168,000 a year

CesiumAstro considers several factors when extending an offer, including but not limited to, the role and associated responsibilities, a candidate’s work experience, education/training, and key skills.

• Full-time employment offers include company stock options and a generous benefits package including health, dental, vision, HSA, FSA, life, disability and retirement plans.

CesiumAstro is an Equal Opportunity employer. All qualified applicants will receive consideration for employment without regard torace, color, religion, sex, national origin, disability, protected Veteran Status, or any other characteristic protected by applicable federal, state, or local law.

Please note: CesiumAstro does not accept unsolicited resumes from contract agencies or search firms. Any unsolicited resumes submitted to our website or to CesiumAstro team members will be considered property of CesiumAstro, and we will not be obligated to pay any referral fees.