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CesiumAstro in El Segundo, CA is seeking a Senior FPGA Engineer to design, verify, and deploy HDL-based FPGA systems for satellite and aerospace hardware. You will work across HDL level designs, high-speed interfaces, clock domains, and data processing cores, collaborating with customers and the executive team.
Requirements include a BS/MS in Electrical or Computer Engineering and at least 6 years of FPGA design experience with Verilog/VHDL, Vivado, ModelSim, plus hands-on lab instrumentation.
Please Note: To conform with the United States Government Space Technology Export Regulations, the applicant must be a U.S. citizen, lawful permanent resident of the U.S., conditional resident, asylee or refugee (protected individuals as defined by 8 U.S.C. 1324b(a)(3)), or eligible to obtain the required authorizations from the U.S. Department of State.
At CesiumAstro, we are developers and pioneers of out-of-the-box communication systems for satellites, UAVs, launch vehicles, and other space and airborne platforms. We take pride in our dynamic and cross-functional work environment, which allows us to learn, develop, and engage across our organization. If you are looking for hands‑on, interactive, and autonomous work, CesiumAstro is the place for you. We are actively seeking passionate, collaborative, energetic, and forward‑thinking individuals to join our team.
We are looking to add a Senior FPGA Engineer to our team. If you enjoy working in a startup environment and are passionate about developing leading‑edge hardware for satellites, spacecraft, and aerospace systems, we would like to hear from you.
In this position, you will be responsible for FPGA circuits and systems through all phases of the development process. The ideal candidate will have experience in FPGA design, verification, test, and deployment at the HDL level. FPGA HDL designs will include high‑speed serial interfaces and data streams, digital processing cores, multiple clocks and clock domains, and management interfaces. Testing, validation, and verification will also be central tasks for any FPGA design. Experience in digital signal processing or board‑level hardware design is also desirable.
The successful candidate will present engineering design review materials to our customers and executive team, as well as participate in proposal‑writing efforts. As such, excellent written and verbal communication skills are required.
$140,000 - $168,000 a year
CesiumAstro considers several factors when extending an offer, including but not limited to, the role and associated responsibilities, a candidate’s work experience, education/training, and key skills.
CesiumAstro is an Equal Opportunity employer. All qualified applicants will receive consideration for employment without regard torace, color, religion, sex, national origin, disability, protected Veteran Status, or any other characteristic protected by applicable federal, state, or local law.
Please note: CesiumAstro does not accept unsolicited resumes from contract agencies or search firms. Any unsolicited resumes submitted to our website or to CesiumAstro team members will be considered property of CesiumAstro, and we will not be obligated to pay any referral fees.