Senior FPGA Engineer

Ayosemi; Boston (MA); Hybrid; USD 120,000 - 180,000; Full time

Benefits offered by this job

Health insurance

Dental insurance

Vision insurance

Equity

Job summary

Ayo sem i in Boston is seeking a Senior FPGA Engineer to join our hardware team. You will write and deploy RTL and embedded C/C++ code on FPGAs central to our chip development and verification workflow.

This hands-on role requires real hardware experience, collaboration with AI and hardware teams, and ownership of prototype builds from bring-up to test benches as we scale our FPGA infrastructure.

Qualifications

• RTL proficiency in Verilog or VHDL mandatory.
• Real industry FPGA experience with deployed code on real hardware.
• Strong programming ability beyond RTL.
• Familiarity with FPGA platforms (Xilinx/AMD preferred; others OK).
• Embedded systems experience with ADC/DAC interfaces is a plus.

Responsibilities

• Design, implement, and test FPGA-based systems for chip verification and prototype development.
• Deploy and iterate RTL code (Verilog or VHDL) targeting FPGAs in prototype hardware.
• Deploy and iterate embedded C/C++ code targeting embedded processors on FPGA SoCs.
• Support FPGA trade studies and pin-mapping viability for developmental PCBs.
• Assist bring-up and test of PCBs and prototypes by writing/testing interfaces to peripherals.
• Collaborate with ASIC engineers to build test benches and validate chips.
• Upgrade and scale existing FPGA infrastructure as we grow.

Skills

RTL proficiency

Verilog

VHDL

C/C++

FPGA platforms

Embedded systems

ASIC verification workflows

Education

Bachelor's or Master's degree in Electrical Engineering or related

Job description

Come build the future of compute with us.

Location

Employment Type

Full time

Location Type

On-site

Department

About Ayo

Ayo is a venture-backed early-stage startup that will radically redefine how humanity performs compute for AI. Our photonic processors will provide orders of magnitude improvement in speed and power efficiency in comparison to conventional digital compute platforms by taking advantage of the natural parallelism, speed and energy efficiency of light.

The Role

We are looking for a Senior FPGA Engineer to join our hardware team. You will write and deploy code to FPGAs that are central to our chip development and verification workflow. This is hands-on work with real hardware - you will move fast, own your work end to end, and collaborate closely with our AI and hardware teams to keep our prototype development moving.

This is a fully onsite role based in Boston. Candidates must be authorized to work in the United States; we cannot sponsor visas for this role.

What You'll Do

Design, implement, and test FPGA-based systems that support our chip verification and prototype development pipeline.

Deploy and iterate on RTL code (Verilog or VHDL) targeting FPGAs in our prototype hardware.

Deploy and iterate on embedded C/C++ code targeting embedded processors on FPGA system-on-chips

Support the hardware team by performing FPGA trade studies and assessing the viability of proposed pin mappings on developmental circuit card assemblies

Support bring-up and test of new printed circuit boards and prototypes by writing and testing interfaces to peripherals such as ADCs, DACs, memory, etc.

Work closely with ASIC engineers to build test benches to test ASICs and to bring up and test prototypes of our computing systems..

Contribute to upgrading and scaling our existing FPGA infrastructure as we grow.

What We're Looking For

RTL proficiency required - Verilog or VHDL. This is the foundation of the role.

Real industry FPGA experience - we want to see that you have deployed code to real hardware, not just completed academic coursework projects.

Strong general programming ability, in addition to RTL.

Familiarity with major FPGA platforms - Xilinx/AMD experience is preferred; Lattice or Intel/Altera is also fine.

Embedded systems experience is a plus - ADC/DAC interfaces, working with real-world signals.

Any exposure to ASIC verification workflows is a bonus - if you've sat next to a chip design and used FPGAs to validate it, we want to hear about it.

Undergraduate or Master's degree - a PhD is not required. We care about what you've built, not the credential.

Why Ayo

You'll be the first FPGA engineer on the team - your work will directly shape how we validate our chips and build our prototypes.

We are working on a genuinely hard and interesting problem: unseating the GPU as the dominant AI compute platform.

Early-stage means real ownership, real impact, and meaningful equity.

Competitive salary. Equity commensurate with stage and seniority. Benefits package including health, dental, and vision.

Fully onsite in Boston - we are a collaborative, in-person team.