Senior FPGA & Electrical Design Engineer

Synchron; San Diego (CA); On-site; USD 140,000 - 180,000; Full time

Job summary

Synchron is seeking a Senior R&D Engineer, Electrical & FPGA Design in San Diego to own HDL design for a high-reliability implantable device. You will define and implement low-power FPGA logic, supervisory functions, and a robust high-speed serial link with external silicon partners.

The role covers electrical architecture, inductive charging, RF telemetry, and strict design-controls processes. Responsibilities include timing closure, RTL/schematics reviews, and collaboration with firmware and

Qualifications

• Bachelor's degree in electrical engineering, computer engineering, or a related discipline.
• 8+ years in mixed-signal hardware design for miniaturized, high-reliability electronic systems.
• 5+ years of hands-on FPGA development: synthesizable VHDL or SystemVerilog, clock-domain crossing, timing closure, and verification.
• Working knowledge of serial interfaces: SPI/I2C, LVDS/CML signaling, framing and error detection, register-map design.
• Experience with safety-relevant or fault-tolerant digital systems: watchdogs, redundant monitors, fail-safe defaults, fault detection and isolation.
• Experience with inductive power transfer or near-field wireless charging, or equivalent resonant/magnetics design.
• Proficiency in high-density PCB and flex-circuit design; Altium Designer; basic EM/spice simulation.

Responsibilities

• Architect and develop synthesizable HDL for a low-power implant FPGA; define interface and bring-up strategies.
• Define and verify FPGA/MCU interface (SPI, register map); lead FPGA bring-up and diagnostics.
• Own timing closure, clock-domain crossing, and low-power clocking; develop self-checking testbenches.
• Define the implant-side of the high-speed serial link; manage framing, synchronization, and error detection.
• Design architecture for safety and redundancy; ensure ISO 14971 compliance and fail-safe defaults.
• Lead electrical architecture decisions including inductive charging and RF telemetry; optimize power budgets.

Skills

FPGA development

VHDL/SystemVerilog

Timing closure

Clock-domain crossing

SPI/I2C interface design

LVDS signaling

Safety-critical engineering

RF/Inductive power or wireless link

Education

Bachelor's degree in electrical or computer engineering

Tools

Altium Designer

Job description

Synchron is seeking a Senior R&D Engineer, Electrical & FPGA Design in San Diego to own HDL design for a high-reliability implantable device. You will define and implement low-power FPGA logic, supervisory functions, and a robust high-speed serial link with external silicon partners.

The role covers electrical architecture, inductive charging, RF telemetry, and strict design-controls processes. Responsibilities include timing closure, RTL/schematics reviews, and collaboration with firmware and