Senior FPGA Design & Firmware Architect

QUALCOMM, Inc.; San Diego (CA); On-site; USD 146,000 - 218,000; Full time

Job summary

Qualcomm Technologies, Inc. in San Diego, CA is seeking a Senior FPGA Design / FPGA Firmware Engineer to design, implement, and debug FPGA RTL and firmware for emulation and prototyping platforms.

You will work with AMD/Xilinx and Intel toolchains, tackle HW/SW partitioning, and drive complex system integration across hardware and software teams. The role emphasizes hands-on RTL/HDL development, embedded software integration, and applying AI/ML techniques to improve design flows and automation

Qualifications

• Bachelor's degree in EE/CE/CS.
• 5+ years FPGA design/firmware experience.
• Strong SystemVerilog/Verilog RTL HDL experience.
• Experience with AMD/Xilinx or Intel FPGA platforms and toolchains.

Responsibilities

• Design, implement, debug FPGA RTL and firmware for emulation and prototyping platforms.
• Develop FPGA solutions using AMD/Xilinx and Intel toolchains.
• Contribute to system architecture, HW/SW partitioning, FPGA architecture and system integration.
• Work on clock/reset architecture, clock-domain crossings, high-speed interfaces, and timing closure.
• Design and integrate high-speed FPGA interfaces (PCIe, MGT/SerDes, LVDS).
• Develop and integrate embedded software/firmware for FPGA-based systems.

Skills

SystemVerilog/Verilog

RTL/HDL design

C++

Python

Analytical and debugging

Interpersonal communication

Team collaboration

Education

Bachelor's degree in Electrical/Computer Engineering or Computer Science

Master's degree in related field

PhD in related field

Tools

Vivado

Quartus

Job description

Qualcomm Technologies, Inc. in San Diego, CA is seeking a Senior FPGA Design / FPGA Firmware Engineer to design, implement, and debug FPGA RTL and firmware for emulation and prototyping platforms.

You will work with AMD/Xilinx and Intel toolchains, tackle HW/SW partitioning, and drive complex system integration across hardware and software teams. The role emphasizes hands-on RTL/HDL development, embedded software integration, and applying AI/ML techniques to improve design flows and automation