Senior FPGA Design Engineer — SDR & RF Systems

Qualis LLC; Huntsville (AL); On-site; USD 110,000 - 160,000; Full time

Benefits offered by this job

Health, dental, and vision insurance

401(k) match

Paid time off and holidays

Education, professional development &

Job summary

Qualis LLC seeks an experienced FPGA/Digital Design Engineer to deliver high-performance FPGA solutions for advanced RF and software-defined radio systems. The role emphasizes hands-on AMD/Xilinx FPGA development, Vivado workflows, PetaLinux integration, and scripting automation.

You will work across RF, software, systems, and hardware teams to design, test, and optimize RTL, embedded Linux stacks, and reference designs for next-generation SDR, EW, sensing, and PNT technologies.

Qualifications

• Bachelor’s degree from ABET-accredited college/university in Electrical Engineering, Computer Engineering, Physics, or related field.
• 8+ years experience developing FPGA-based systems.
• Hands-on AMD/Xilinx FPGA devices and Vivado experience.

Responsibilities

• Design, develop, integrate, and test FPGA-based processing solutions for RF and SDR systems.
• Develop FPGA designs using VHDL, Verilog, and SystemVerilog in AMD/Xilinx Vivado.
• Develop embedded Linux solutions using PetaLinux and board-support packages.
• Configure and validate FPGA interfaces and high-speed digital peripherals.
• Collaborate with RF, software, systems, and hardware engineers to deliver integrated solutions.

Skills

FPGA development

HDL: VHDL/Verilog

SystemVerilog

Vivado

PetaLinux

Tcl scripting

Embedded Linux

Education

ABET-accredited degree in EE/CE/Physics

Tools

Vivado

PetaLinux

Tcl scripting

Vitis

Job description

Qualis LLC seeks an experienced FPGA/Digital Design Engineer to deliver high-performance FPGA solutions for advanced RF and software-defined radio systems. The role emphasizes hands-on AMD/Xilinx FPGA development, Vivado workflows, PetaLinux integration, and scripting automation.

You will work across RF, software, systems, and hardware teams to design, test, and optimize RTL, embedded Linux stacks, and reference designs for next-generation SDR, EW, sensing, and PNT technologies.