Senior FPGA Design Engineer — Radar & Avionics

Reliable Robotics; Mountain View (CA); On-site; USD 215,000 - 300,000; Full time

Benefits offered by this job

Stock option awards

Benefits package

Job summary

Reliable Robotics seeks a Senior FPGA Design Engineer to own the full FPGA lifecycle for the Air to Air Radar system from architecture to testing. You will translate MATLAB algorithms to fixed-point VHDL and verify real-time performance.

You will collaborate with avionics and radar teams, define FPGA requirements, and ensure high-quality hardware through iterative reviews within a fast-paced development environment.

Qualifications

• Bachelor's degree in Electrical Engineering or Computer Engineering (or equivalent).
• 8+ years of full-cycle electronics hardware development experience.
• Professional experience designing FPGA digital logic using industry-standard design, simulation, and synthesis tools.

Responsibilities

• Own the full lifecycle of FPGA design, including architecture, implementation, synthesis, hardware integration, and testing for the radar system.
• Translate MATLAB algorithms to fixed-point VHDL implementations and verify real-time performance.
• Define high-level FPGA requirements and hardware/software interfaces with avionics/radar teams; conduct tradeoffs.
• Collaborate in a fast-paced, agile development environment with mutual peer reviews to ensure quality.

Skills

FPGA design

Fixed-point DSP

MATLAB to VHDL

Agile development

Education

Bachelor's degree in Electrical Engineering or Computer Engineering

Advanced degree in Electrical Engineering or Computer Engineering

Tools

FPGA design tools

MATLAB

HDL simulators

Job description

Reliable Robotics seeks a Senior FPGA Design Engineer to own the full FPGA lifecycle for the Air to Air Radar system from architecture to testing. You will translate MATLAB algorithms to fixed-point VHDL and verify real-time performance.

You will collaborate with avionics and radar teams, define FPGA requirements, and ensure high-quality hardware through iterative reviews within a fast-paced development environment.