Senior FPGA Design Engineer — High-Performance Defense Tech

Long Wall; City of Long Beach (NY); On-site; USD 135,000 - 225,000; Full time

Benefits offered by this job

Medical insurance

Long-term disability (LTD) coverage

4% 401k match

Paid parental leave

Paid time off

Job summary

Long Wall is seeking an FPGA Design Engineer to lead firmware development for high‑performance data acquisition and processing on Xilinx/AMD platforms. You will join a small team of hardware, software, and systems engineers, taking designs from concept to production and delivering flight-ready interfaces and IP cores.

5+ years of FPGA development with HDL (VHDL/Verilog/SystemVerilog), Vivado/Vitis, and PCIe/SerDes are required; Master’s degree preferred.

Qualifications

• Bachelor’s degree in Electrical or Computer Engineering or related field.
• 5+ years hands-on FPGA development with AMD/Xilinx platforms.
• Strong HDL skills (VHDL/Verilog/SystemVerilog).
• Experience with Vivado/Vitis toolchains and IP cores.

Responsibilities

• Design, implement, and verify FPGA firmware for Xilinx/AMD platforms.
• Debug and validate firmware with hardware-in-the-loop testing.
• Collaborate with hardware engineers to define FPGA I/O and interfaces.
• Work with software engineers to develop CPU driver interfaces for IP cores.
• Create and maintain design specifications, timing reports, and test plans.
• Contribute to architecture decisions for FPGA/embedded systems.

Skills

HDL languages

HDL Verilog/SystemVerilog

Xilinx AMD platforms

Vivado/Vitis

PCIe/SerDes

Firmware design

Hardware-software co-design

Debugging with HW test equipment

Git/CI-CD

Multi-clock domain design

Education

Bachelor’s degree in Electrical/Computer Engineering

5+ years FPGA development

Master’s degree (preferred)

Tools

Vivado

Vitis

ModelSim/Vivado Simulator

NoC/Versal ACAP (preferred)

Job description

Long Wall is seeking an FPGA Design Engineer to lead firmware development for high‑performance data acquisition and processing on Xilinx/AMD platforms. You will join a small team of hardware, software, and systems engineers, taking designs from concept to production and delivering flight-ready interfaces and IP cores.

5+ years of FPGA development with HDL (VHDL/Verilog/SystemVerilog), Vivado/Vitis, and PCIe/SerDes are required; Master’s degree preferred.