Senior FPGA Design Engineer

Actalent; Greenville (SC); On-site; USD 103,000 - 124,000; Full time

Benefits offered by this job

Medical coverage

401(k)

Paid time off

Job summary

Actalent in Greenville, SC is seeking a Senior FPGA Design Engineer to lead development, verification, and optimization of high-speed FPGA solutions. You will own RTL design using Verilog/VHDL/SystemVerilog and collaborate with hardware and software teams across the board.

This on-site contract-to-hire role offers exposure to PCIe Gen4/5, 10–100G Ethernet, DDR4/DDR5, and advanced test benches, with mentorship of junior engineers and a focus on reliability standards.

Qualifications

• 8+ years of FPGA design experience with RTL responsibilities.
• Proven verification experience with robust testbenches and code coverage.
• Expertise with high-speed interfaces (PCIe Gen4/5, 10–100G Ethernet).
• Strong RTL knowledge in Verilog/VHDL/SystemVerilog and SoC technologies.
• Ability to perform power estimation and architectural optimization.
• Security clearance or eligibility for one is preferred.

Responsibilities

• Lead full life-cycle FPGA development from requirements to system integration.
• Define FPGA architecture, document block diagrams, and lead design reviews.
• Develop robust testbenches and ensure verification rigor with coverage goals.
• Create test plans and reports; collaborate with hardware/software teams.
• Implement DFT features and ensure compliance with test standards.
• Mentor junior engineers and drive design-practice improvements.

Skills

RTL design

Testbench development

Vivado/Quartus

FPGA architecture

Power estimation

High-speed interfaces

SoC technologies

Secret Clearance

Tools

Xilinx Vivado

Intel Quartus

Job description

Job Title: Senior FPGA Design Engineer

We are seeking a Senior FPGA Design Engineer with over 8 years of experience to lead the development, implementation, and verification of high-speed FPGA solutions. This role requires expertise in high-bandwidth interfaces, such as PCIe Gen4/5, 10 to 100G+ Ethernet, and DDR4/DDR5. The candidate will excel in RTL design using VHDL/Verilog/SystemVerilog and will be responsible for driving FPGA design from concept through production, optimizing for low latency and high throughput, and ensuring compliance with reliability standards.

Responsibilities

• Lead full life-cycle FPGA development, from requirements and architecture through RTL implementation, verification, and system integration across multiple FPGA families.
• Define and document FPGA architecture, including block diagrams and clocking strategies, and conduct design reviews.
• Develop robust and reusable testbenches and achieve code coverage closure.
• Create and execute detailed test plans, procedures, and reports to ensure verification rigor.
• Collaborate with hardware and software teams to integrate FPGA designs at the board and system level.
• Implement and validate JTAG boundary scan and other DFT features, ensuring compliance with design-for-test standards.
• Drive continuous improvement in design practices and mentor junior engineers.

Essential Skills

• Strong proficiency in RTL design using Verilog/VHDL.
• Experience in testbench development and verification of complex FPGA designs.
• Proficient with FPGA simulation and synthesis tools such as Xilinx Vivado and Intel Quartus.
• Proficiency in FPGA architecture and optimization techniques.
• Ability to perform FPGA power estimation and analysis.
• Strong understanding of high-speed interfaces and control protocols.
• Experience with System-on-Chip technologies.
• Secret Clearance

Additional Skills & Qualifications

• Proficiency in FPGA Block Design development and debugging.
• Familiarity with Universal Verification Methodology (UVM).
• Familiarity with revision control systems and scripting for automation.
• Skilled in FPGA lab validation using oscilloscopes and protocol analyzers.
• Strong communication skills and experience collaborating in Agile environments.
• Understanding of formal verification processes and compliance standards.

Work Environment

The position requires working 100% onsite due to the nature of the work. The environment includes cubicle-based workspaces and a small test lab. The team culture is diverse, with some individuals enjoying social activities after work, while others focus more on family-oriented engagements. The schedule includes a 9/80 work arrangement, providing every other Friday off.

Job Type & Location

This is a Contract to Hire position based out of Greenville, SC.

Pay And Benefits

The pay range for this position is $75.00 - $90.00/hr.

Individual compensation offered for this position within this range will depend on many factors, including qualifications, skills, relevant experience, job knowledge, geographic location, internal equity, and other pertinent job-related factors.

Eligibility requirements apply to some benefits and may depend on your job classification and length of employment. Benefits are subject to change and may be subject to specific elections, plan, or program terms. If eligible, the benefits available for this temporary role may include the following: Medical, dental & vision Critical Illness, Accident, and Hospital 401(k) Retirement Plan Pre-tax and Roth post-tax contributions available Life Insurance (Voluntary Life & AD&D for the employee and dependents) Short and long-term disability Health Spending Account (HSA) Transportation benefits Employee Assistance Program Time Off/Leave (PTO, Vacation or Sick Leave)

Workplace Type

This is a fully onsite position in Greenville,SC.

Application Deadline

This position is anticipated to close on Oct 21, 2026.

About Actalent

Actalent is a global leader in engineering and sciences services and talent solutions. We help visionary companies advance their engineering and science initiatives through access to specialized experts who drive scale, innovation and speed to market. With a network of almost 20,000 consultants and 5,000 clients across the U.S., Canada, Asia and Europe, Actalent serves many of the Fortune 500. We are proud to be an Engineering News-Record (ENR) Top 500 Design Firm for our engineering design services and a ClearlyRated Best of Staffing® winner for both client and talent service.

The company is an equal opportunity employer and will consider all applications without regard to race, sex, age, color, religion, national origin, veteran status, disability, sexual orientation, gender identity, genetic information or any characteristic protected by law.

If you would like to request a reasonable accommodation, such as the modification or adjustment of the job application process or interviewing process due to a disability, please email [e-mail] for other accommodation options.

San Francisco Fair Chance Ordinance

Pursuant to the San Francisco Fair Chance Ordinance, for all positions located in the city and county of San Francisco, we will consider for employment qualified applicants with arrest and conviction records.

Massachusetts Lie Detector

It is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment or continued employment. An employer who violates this law shall be subject to criminal penalties and civil liability.

Use of Artificial Intelligence (AI)

We may use Artificial Intelligence (AI) to support parts of our hiring process, including sourcing, screening, and evaluating candidates. AI helps assess applications and qualifications, but final decisions are made by our hiring team. By applying, you acknowledge and agree that your application may be reviewed using AI tools.