Senior FPGA Design Engineer

Triple Crown; El Segundo (CA); On-site; USD 100,000 - 150,000; Full time

Job summary

Join a forward-thinking company as an FPGA Design Engineer where you'll leverage your expertise in Xilinx Vivado to develop cutting-edge FPGA solutions. This contract position offers the chance to work on complex hardware systems, integrating high-performance designs that push the boundaries of technology. With a focus on digital communication and networking, you'll be at the forefront of innovation in the space research and technology industry. If you are passionate about engineering and eager to contribute to transformative projects, this role is perfect for you.

Benefits

Health Insurance

Dental Insurance

Vision Insurance

401k

Qualifications

• Experience with FPGA infrastructure and server applications.
• Knowledge of digital communication protocols like SPI, I2C, and Ethernet.

Responsibilities

• Architect and implement FPGA solutions for server applications.
• Develop high-performance FPGA designs and verify with Python.

Skills

Verilog/System Verilog

RTL

SPI

I2C

Ethernet

SoC

Digital Communication

Python Verification

Tools

Xilinx Vivado

Intel Quartus Prime

PetaLinux

Job description

6 days ago Be among the first 25 applicants

Triple Crown is a leading provider of hardware, embedded, software, and mechanical engineering talent. Businesses and technology teams, from Fortune 500 enterprises to emerging startups, rely on our ability to rapidly place the developers, architects, coders, and designers who engineer digital transformation and growth.

CONTRACT Position: 12 Months

We are seeking an experienced FPGA Design Engineer to join our engineering team on a contract basis. In this role, you will be responsible for architecting, designing, and implementing FPGA infrastructure targeted for server applications. You will leverage your expertise with Xilinx Vivado to develop high-performance, reliable FPGA solutions that integrate seamlessly into complex hardware systems.

• Xilinx Vivado experience, it will be a plus if they also have other tools like Intel Quartus Prime or Lattice.
• Experience integrating on a Linux platform. All their processors are on Linux. BIG plus if they have PetaLinux experience.
• Experience writing RTL
• Experience with Xilinx Vivado is preferred, or similar SW tools that's used on SoC.
• Must have Digital Communication experience such as networking and1 gig ethernet. Some of the common serial communication protocols he mentioned were SPI, I2C, RS422, ethernet.
• Experience implementing networks in FPGA, AXI, AXI-Stream
• Xilinx FPGA experience
• Experience throughout the FPGA/HW product development lifecycle
• Define system requirements, decompose system requirements and develop HW level requirements
• Design implementation
• Verification and artifact development/documentation
• Verification experience with Python is a must (they don't do UVM)
• Experience with pipelining, timing, and clock gating to optimize a design and meet the required timing constraints
• Board bring up and troubleshooting (know how to use an oscilloscope)

Skills:

• Verilog/System Verilog (MUST HAVE)
• RTL
• SPI
• I2C
• Ethernet
• SoC
• Health, Dental and Vision Insurance
• 401k

Seniority level

• Seniority level

  Mid-Senior level

Employment type

• Employment type

  Contract

Job function

• Industries

  Space Research and Technology

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Inferred from the description for this job

Vision insurance

401(k)

Medical insurance

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