Senior FPGA Architect — Space Systems

Trident Systems; Fairfax (VA); On-site; USD 116,000 - 216,000; Full time

Benefits offered by this job

Health benefits

401(k) matching

Tuition reimbursement

Paid time off

Holidays

Job summary

Trident Systems in Fairfax, VA, is seeking a Principal FPGA Engineer to lead the design and verification of advanced FPGA solutions for space-grade systems. You will architect, implement, and validate high-speed logic using AMD Xilinx technologies and collaborate across hardware and software teams.

The role requires deep RTL expertise, timing closure, simulation, and experience with Vivado, SystemVerilog, and VHDL.

Qualifications

• Bachelor's degree in Computer Engineering or Electrical Engineering.
• 7+ years with a bachelor’s or 9+ years with a master’s.
• Strong FPGA design methodology including timing, synthesis, place/route, power analysis and timing closure.
• Experience with Xilinx SoC/FPGA devices using the Vivado Design Suite.
• Experience with RTL design using VHDL and SystemVerilog.
• Experience with FPGA debugging tools such as Vivado HW Debugger, Chipscope, SmartDebug.

Responsibilities

• Architect, implement, and verify complex high-speed FPGA designs for space systems.
• Create and maintain complete FPGA designs using VHDL and Vivado IP Integrator.
• Code, simulate, and verify RTL modules for FPGAs including DSP, control algorithms, and peripherals.
• Collaborate with hardware/software engineers during integration to ensure correct implementation.
• Mentor junior engineers and support travel or off-site work as needed.

Skills

RTL design

Timing closure

VHDL

Vivado

SystemVerilog

Xilinx FPGA

Vivado IP Integrator

Embedded ARM

Linux

Education

Bachelors in Electrical/Computer Engineering

Masters in related field

Tools

Vivado Design Suite

Vivado IP Integrator

ModelSim/QuestaSim

Chipscope

Git

Job description

Trident Systems in Fairfax, VA, is seeking a Principal FPGA Engineer to lead the design and verification of advanced FPGA solutions for space-grade systems. You will architect, implement, and validate high-speed logic using AMD Xilinx technologies and collaborate across hardware and software teams.

The role requires deep RTL expertise, timing closure, simulation, and experience with Vivado, SystemVerilog, and VHDL.