Senior FPGA Architect for MR Digital Systems

GE Healthcare; Waukesha (WI); On-site; USD 120,000 - 180,000; Full time

Job summary

GE HealthCare seeks a Senior FPGA & Digital Design Engineer to architect and develop advanced FPGA-based systems powering MR imaging technologies.

You will lead RTL development, verification, and system integration, collaborating across hardware, software, firmware, ASIC, and systems teams. This role emphasizes hands-on leadership, design verification, and delivering scalable digital platforms for next-gen MR products.

Qualifications

• Bachelor’s degree in Electrical Engineering or Computer Engineering.
• 5 years of FPGA and digital design experience.
• Strong expertise in VHDL and/or Verilog.
• Experience with simulation, verification, timing analysis, and timing closure.
• Experience implementing high-speed digital interfaces such as PCIe, Ethernet, JESD204, DDR, LVDS.

Responsibilities

• Lead FPGA architecture, design, implementation, and verification for advanced MR platforms.
• Develop RTL using VHDL and/or Verilog and drive designs through simulation, timing closure, and hardware validation.
• Design and integrate complex digital systems involving FPGAs, processors, memory, ADCs/DACs, and high-speed serial interfaces.
• Define verification strategies, simulation environments, and reusable testbench infrastructure.
• Mentor engineers and provide technical leadership across programs.
• Support products throughout the full lifecycle from concept to manufacturing and field support.

Skills

FPGA architecture

RTL development

Verification

High-speed interfaces

Mentoring engineers

Digital system troubleshooting

Education

Bachelor's degree in Electrical/Computer Engineering

Master’s or PhD in Electrical Engineering (preferred)

Tools

VHDL

Verilog

PCIe

Ethernet

JESD204

DDR

LVDS

Job description

GE HealthCare seeks a Senior FPGA & Digital Design Engineer to architect and develop advanced FPGA-based systems powering MR imaging technologies.

You will lead RTL development, verification, and system integration, collaborating across hardware, software, firmware, ASIC, and systems teams. This role emphasizes hands-on leadership, design verification, and delivering scalable digital platforms for next-gen MR products.