Senior Formal Verification Engineer - Modem SoC (NoC/AI)

Amazon; Sunnyvale (CA); Sur place; USD 213 000 - 288 000; Plein temps

Résumé du poste

Amazon Kuiper Manufacturing Enterprises LLC in Sunnyvale, CA is seeking a Senior Formal Verification Engineer to drive formal verification across our modem SoC designs. You will apply rigorous mathematical methods to prove design correctness and collaborate with RTL, DV, emulation teams to shift verification left.

You will champion a formal-first strategy, develop reusable infrastructure, and mentor DV engineers while partnering with EDA vendors to evaluate new capabilities.

Qualifications

• Bachelor's degree in electrical engineering, computer engineering, or equivalent.
• 8+ years of ASIC/SoC design verification with a strong focus on formal verification.
• Experience with JasperGold and/or Questa Formal.
• Proficiency in SystemVerilog Assertions (SVA) and formal property specification.
• Experience with FPV, CC, register verification, equivalence checking, and coverage analysis.

Responsabilités

• Develop and execute formal verification strategies using JasperGold and/or Questa.
• Write, review, and debug SystemVerilog Assertions (SVA) — including assumptions, assertions, and cover properties.
• Drive convergence on formal proofs by applying abstraction techniques and assume-guarantee reasoning.
• Collaborate with RTL designers, architects, and simulation-based DV engineers to define verification plans.
• Champion a formal-first verification strategy and build reusable verification infrastructure.

Connaissances

Formal verification

SystemVerilog Assertions

JasperGold/Questa

UVM concepts

AI-assisted SVA

Formation

Bachelor's degree in electrical/computer engineering

Outils

Python

Tcl

Perl

Description du poste

Amazon Kuiper Manufacturing Enterprises LLC in Sunnyvale, CA is seeking a Senior Formal Verification Engineer to drive formal verification across our modem SoC designs. You will apply rigorous mathematical methods to prove design correctness and collaborate with RTL, DV, emulation teams to shift verification left.

You will champion a formal-first strategy, develop reusable infrastructure, and mentor DV engineers while partnering with EDA vendors to evaluate new capabilities.