AI-Driven Modem Verification Engineer

Qualcomm; Boxborough (MA); On-site; USD 155,000 - 233,000; Full time

Job summary

Qualcomm Technologies, Inc. is seeking a highly skilled Modem Hardware Design Verification Engineer to join our advanced verification team in Boxborough, MA. You will define verification plans, build reusable environments, and apply cutting‑edge verification methods for wireless modem designs.

The role blends traditional DV with AI-driven flows and GenAI, ML-assisted automation to accelerate coverage closure and improve debug efficiency.

Qualifications

• Bachelor's/ Master’s/ PhD with 4+ years of relevant work experience in software/hardware engineering.
• Experience in verification planning, testbench architecture, assertions, debugging and problem solving.
• Hands-on constrained-random verification using SystemVerilog with UVM/OVM; strong coding and debugging skills.

Responsibilities

• Define and execute verification plans for modem hardware.
• Build reusable verification environments and apply advanced verification techniques.
• Collaborate with system, firmware, and RTL teams to ensure first-time-right silicon for high-performance modems.

Skills

Verification planning

Testbench architecture

Assertions

Debugging

Problem solving

Verilog/VHDL

C/C++

SystemC

Python/Perl scripting

Unix/Linux shell scripting

Education

Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field

Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field

PhD in Computer Engineering, Computer Science, Electrical Engineering, or related field

Tools

SystemVerilog

UVM/OVM

Python

Perl

Unix/Linux shell

XML

Makefiles

Job description

Qualcomm Technologies, Inc. is seeking a highly skilled Modem Hardware Design Verification Engineer to join our advanced verification team in Boxborough, MA. You will define verification plans, build reusable environments, and apply cutting‑edge verification methods for wireless modem designs.

The role blends traditional DV with AI-driven flows and GenAI, ML-assisted automation to accelerate coverage closure and improve debug efficiency.