Senior Engineer, Physical Design (ASIC/SoC Place & Route) (Austin, TX)(5560)

TSMC - Taiwan Semiconductor Manufacturing Company Limited; Austin (TX); Hybrid; USD 107,000 - 162,000; Full time

Job summary

TSMC - Taiwan Semiconductor Manufacturing Company Limited in Austin, Texas, is seeking a Senior Engineer for Physical Design (ASIC/SoC Place & Route). You will own the APR implementation flow from RTL to GDS, including synthesis, floorplanning, placement and routing, CTS, STA, and signoff, reporting to the Manager of Advanced Chip Implementation.

The role requires a Master’s degree with 7+ years of experience, proficiency in Netlist-GDS and major EDA tools, and scripting with Perl/TCL.

Qualifications

• Master’s degree in Electrical/Computer Engineering with 7+ years of industry experience.
• Netlist (or RTL)-GDS physical implementation experience.
• In depth knowledge of major EDA tools/design flows.
• Experience with TSMC N16 or below technology.

Responsibilities

• Complete entire physical implementation of the block level and tapeout production chip.
• Block level floorplan with the ability to analyze the quality of the floorplan.
• Customized Clock tree structure and Place & Route.
• Implement ECOs for timing closure.
• Signal EM/Noise and Power/IR/EM analysis and fix.
• DRC/LVS/ERC/ANTENNA analysis and clean up.
• Physical verification sign off.

Skills

RTL-to-GDS

EDA tools

Perl/TCL

Block level implementation

Synthesis

Floorplanning

Signoff

Customer site Austin

Education

Master’s degree in Electrical/Computer Engineering

Tools

Netlist-GDS

Perl/TCL scripting

Job description

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Senior Engineer, Physical Design (ASIC/SoC Place & Route) (Austin, TX)(5560)

Overview of Role

As a Sr. Physical Design Engineer, you will be responsible for the entire APR implementation flow from RTL-to-GDS that includes synthesis, floorplan, place and route, CTS, STA, and signoff. You will be reporting to Manager of Advanced Chip implementation team at its Austin Design Center, Texas and joining a team of engineers dedicated to pushing the envelope for the world’s leading semiconductor company. We are currently operating in a hybrid work schedule with 4 days in office.

Responsibilities

• Complete entire physical implementation of the block level and tapeout production chip
• Block level floorplan with the ability to analyze the quality of the floorplan
• CustomizedClock tree structure and Place & Route
• Implement ECOs for timing closure
• Signal EM/Noise and PowerIR/EM analysis and fix
• DRC/LVS/ERC/ANTENNA analysis and clean up
• Physical verification sign off

Minimum Qualifications

• Master’s degree in Electrical/Computer Science Engineering with 7+ years of industry experience.
• Netlist (or RTL)-GDS physical implementation experience
• In depth knowledge of major EDA tools/design flows
• Experience with TSMC N16 or below technology
• Experience in block level implementation or chip integration and signoff
• Experience in Perl/TCL language programming
• Ability towork regularly ata Customer site in the North Austin, TX area

Preferred Qualifications

• TSMC N5 and below technology
• Low-power implementation methodology
• Advanced timing signoff methodology
• Able to independently complete Netlist-GDS P&R, signoff task
• Proven record in multi-million gate design production tapeouts

Company Description

As a trusted technology and capacity provider, TSMC is driven by the desire to be:

• The world’s leading dedicated semiconductor foundry
• The technology leader with a strong reputation for manufacturing excellence
• Advancing semiconductor manufacturing innovations to enable the future of technology

TSMC pioneered the pure-play foundry business model when it was founded in 1987 and has been the world’s leading dedicated semiconductor foundry ever since. The Company supports a thriving ecosystem of global customers and partners with the industry’s leading process technologies and a portfolio of design enablement solutions to unleash innovation for the global semiconductor industry. With global operations spanning Asia, Europe, and North America, TSMC serves as a committed corporate citizen around the world. In North America, TSMC has a strong sales and service organization that works with customers by helping them achieve silicon success with cutting-edge technologies and manufacturing excellence. The Company has continued to accelerate its R&D investment and staffing in recent years and is expanding its manufacturing footprint to support customer innovation with 3D IC technologies and optimal manufacturing capacity.

Diversity statement

TSMC Technology, Inc. is committed to employing a diverse workforce and provides Equal Employment Opportunity for all individuals regardless of race, color, religion, gender, age, national origin, marital status, sexual orientation, gender identity, status as a protected veteran, genetic information, or any other characteristic protected by applicable law.

TSMC is an equal opportunity employer prizing diversity and inclusion. We are committed to treating all employees and applicants for employment with respect and dignity. If you require reasonable accommodation due to a disability during the application or the recruiting process, please feel free to notify us at [e-mail] . TSMC confirms to all applicants its commitment to meet TSMC’s obligations under applicable employment law. Reasonable accommodations will be determined on a case-by-case basis.

For positions requiring access to technical data subject to export control regulations, including Export Administration Regulations, TSMC Technology, Inc. may have to obtain export licensing approval from the U.S. Government for certain individuals. All employment is contingent upon TSMC Technology, Inc. obtaining any export license or other approval that may be required by the U.S. Government.

Pay Transparency / Benefits statement

At TSMC, your base pay is only part of your overall total compensation package. At the time of this posting, this role typically pays a base salary between $106,500 and $162,000 per year. The range displayed reflects the minimum and maximum target for new hires. Actual pay may be more or less than the posted range. Factors that influence pay include the individual's skills, qualifications, education, experience and the position level and location. TSMC’s total compensation package consists of market competitive pay, allowances, bonuses, and comprehensive benefits. We also offer extensive development opportunities and programs.