Senior Embedded Software Engineer, DoD Secret Clearance

Raytheon; Atlanta (GA); On-site; USD 108,000 - 205,000; Full time

Job summary

Raytheon is seeking a Principal Embedded Software Engineer in Atlanta to drive embedded software across ARM-based SoCs and FPGA pipelines. The role emphasizes translating system requirements into robust, deterministic software for EW programs, with hands-on work on bare‑metal and embedded Linux environments.

You will collaborate with systems, FPGA, RF, and electrical teams to ensure timing closure and performance margins, while supporting in-lab testing and board bring‑up.

Qualifications

• Bachelor's degree in Science, Technology, Engineering or Mathematics (STEM) required.
• 8+ years of relevant experience typical for this role.
• Experience with C/C++ and Python for automation, integration, and verification workflows.
• Experience building deterministic real‑time software on bare‑metal and embedded Linux (Yocto).
• Must be able to obtain and maintain a U.S. government security clearance.

Responsibilities

• Derive embedded software and FPGA interface requirements from high-level system specifications.
• Architect, implement, and integrate embedded C/C++ software for ARM-based SoCs and FPGA pipelines.
• Develop software‑firmware interaction layers, including drivers and memory controllers.
• Perform system modeling, timing analysis, and simulation of embedded paths and data flows.
• Debug real-time applications on bare‑metal and embedded Linux, including Yocto distributions.

Skills

Embedded C/C++

Python

Yocto

ARM-based SoCs

FPGA integration

Linux

RTOS

Kernel debugging

Education

Bachelor's degree in STEM

Tools

U-Boot

Vitis

Jira

Job description

Raytheon is seeking a Principal Embedded Software Engineer in Atlanta to drive embedded software across ARM-based SoCs and FPGA pipelines. The role emphasizes translating system requirements into robust, deterministic software for EW programs, with hands-on work on bare‑metal and embedded Linux environments.

You will collaborate with systems, FPGA, RF, and electrical teams to ensure timing closure and performance margins, while supporting in-lab testing and board bring‑up.