Senior EDA Tools & Physical Design Engineer

Intel Corporation

Folsom (CA)

Hybrid

USD 142,000 - 269,000

Full time

14 days+

Get more replies from employers

Send a job-specific resume in minutes.

Job summary

Intel Corporation in Santa Clara, California, seeks an EDA Tools Hardware Engineer to shape silicon innovation by enabling advanced design tools and flows. This role focuses on full-chip implementation, CTS integration, and power/architecture optimization.

You will collaborate with EDA vendors, define next-generation toolchains, and contribute to multi-block and multi-power domain designs. The position offers a hybrid work model and competitive compensation.

Qualifications

  • Bachelor's degree in Computer Engineering, Electrical Engineering, Computer Science, or a related field; 6+ years experience, or a Master’s with 4+ years, or PhD with 2+ years.
  • Physical design fundamentals (i.e. placement, routing)
  • Clock tree synthesis (CTS)
  • Full-chip integration methodologies using Innovus

Responsibilities

  • Full Chip Implementation Flow Development
  • Develop and maintain full-chip physical implementation flows including floor planning and partitioning strategies
  • Hierarchical block integration
  • Chip-level placement and routing coordination
  • Power grid planning and analysis
  • Clock tree synthesis (CTS) strategy integration
  • Enable scalable SoC assembly flows for multi-block and multi-power domain designs.
  • Define methodology for hierarchical design reuse and integration.

Skills

CTS
Floorplanning
Placement & routing
Linux scripting

Education

Bachelor's degree in Computer Engineering, Electrical Engineering, Computer Science, or related field
Master's degree
PhD

Tools

Innovus

Job description

Intel Corporation in Santa Clara, California, seeks an EDA Tools Hardware Engineer to shape silicon innovation by enabling advanced design tools and flows. This role focuses on full-chip implementation, CTS integration, and power/architecture optimization.

You will collaborate with EDA vendors, define next-generation toolchains, and contribute to multi-block and multi-power domain designs. The position offers a hybrid work model and competitive compensation.

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

EDA Tools Hardware Engineer
EDA Tools Hardware Engineer

Intel • Hillsboro (OR)

Hybrid
USD 141,000 - 270,000
Health benefits
Retirement plans
Stock bonuses
+1
Senior EDA Tools Engineer (Hybrid)
Senior EDA Tools Engineer (Hybrid)

Intel Corporation • Chandler (AZ)

Hybrid
USD 149,600 - 284,580
Stock bonuses
Health benefits
Retirement plan
+1
Senior EDA Tools Enablement Engineer (Hybrid)
Senior EDA Tools Enablement Engineer (Hybrid)

Intel Corporation • Phoenix (AZ)

Hybrid
USD 174,000 - 285,000
Senior EDA Flow & Power Integrity Engineer
Senior EDA Flow & Power Integrity Engineer

Intel • Folsom (CA)

Hybrid
USD 141,000 - 270,000
Competitive pay
Stock bonuses
Health benefits
+1
Senior EDA Tools Engineer & Tech Lead (Hybrid)
Senior EDA Tools Engineer & Tech Lead (Hybrid)

Intel • Austin (TX)

Hybrid
USD 174,000 - 330,000
Stock bonuses
Health insurance
Retirement plan
+1
Senior EDA Tools Hardware Engineer - Full-Chip Flows
Senior EDA Tools Hardware Engineer - Full-Chip Flows

Intel • Hillsboro (OR)

Hybrid
USD 141,000 - 270,000
Health benefits
Retirement plans
Stock bonuses
+1
EDA Tools Hardware Engineer
EDA Tools Hardware Engineer

Intel Corporation • Folsom (CA)

Hybrid
USD 142,000 - 269,000
Design Technology Tool Enablement Engineer
Design Technology Tool Enablement Engineer

Intel Corporation • Phoenix (AZ)

Hybrid
USD 174,000 - 285,000
EDA Design Flow Development Engineer
EDA Design Flow Development Engineer

Intel • Hillsboro (OR)

Hybrid
USD 141,000 - 270,000
Competitive pay
Stock bonuses
Health benefits
+2
EDA Design Flow Development Engineer
EDA Design Flow Development Engineer

Intel • Austin (TX)

Hybrid
USD 141,000 - 270,000
Competitive pay
Stock bonuses
Health benefits
+2