Senior Director, AI Power Architecture & Silicon Validation

Qualcomm

Hillsboro (OR)

On-site

USD 250,000 - 376,000

Full time

14 days+
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Job summary

Qualcomm Technologies, Inc. in Hillsboro, OR is seeking a Data Center AI Pre and Post Silicon Power Lead to define and validate power targets across IP to rack, develop validation plans, and drive optimizations for AI accelerators.

You will collaborate with design, architecture, verification, firmware, and software teams to ensure robust power modeling, benchmarking, and tuning methods for high-efficiency silicon and system performance.

Qualifications

  • Bachelor's degree in Science, Engineering, or related field with 10+ years in ASIC design/verification/validation/integration.
  • Master's degree in Science, Engineering, or related field with 9+ years in ASIC design/verification/validation/integration.
  • PhD in Science, Engineering, or related field with 8+ years in ASIC design/verification/validation/integration.

Responsibilities

  • Characterize Data Center workloads on system to inform pre-Si modeling.
  • Define end-to-end power analysis plans for complex Datacenter AI systems.
  • Debug issues during pre-silicon, bring-up, validation, and production phases of SOC programs.
  • Define optimization strategy to deliver world-class datacenter AI efficiency.
  • Lead collaborative test approach with multiple teams and track test execution for performance and power.

Skills

ASIC design
Verification
Validation
Integration
C/C++
Python
Power analysis
SoC architecture
Architecture feedback

Education

Bachelor's degree
Master's degree
PhD

Tools

Emulation tools

Job description

Qualcomm Technologies, Inc. in Hillsboro, OR is seeking a Data Center AI Pre and Post Silicon Power Lead to define and validate power targets across IP to rack, develop validation plans, and drive optimizations for AI accelerators.

You will collaborate with design, architecture, verification, firmware, and software teams to ensure robust power modeling, benchmarking, and tuning methods for high-efficiency silicon and system performance.

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