Senior Digital Design Engineer

Asteralabs; San Jose (CA); On-site; USD 120,000 - 180,000; Full time

Job summary

Astera Labs in California seeks Digital Design Engineers to develop micro-architecture and front-end circuit design, including RTL, synthesis and IP integration for high-performance network controllers.

The role requires hands-on experience with PCIe, Ualink, Esun, Ethernet and familiarity with Synopsys/Cadence design flows. Bachelor’s in EE is required, Master’s preferred, and US work authorization is required.

Qualifications

• Bachelor’s degree in EE is required; Master’s preferred.
• Strong front-end design and RTL, synthesis experience.
• Experience with PCIe, Ualink, Esun, Ethernet protocols.
• Experience with Synopsys or Cadence tool flows.
• Familiarity with design for test (DFT) and UVM verification.

Responsibilities

• Develop micro-architecture and front-end circuit design, including RTL and synthesis.
• Perform IP integration and block-level verification for high-performance network controllers.
• Collaborate on PCIe/Uplink/Ethernet interfaces and related protocols using standard tool flows.

Skills

RTL design

Synthesis

IP integration

Front-end design

Verilog/VHDL

UVM-based verification

Python scripting

Education

Bachelor's degree in Electrical Engineering

Master's degree in Electrical Engineering

Tools

Synopsys

Cadence

DFT

Job description

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.

Job Description

We are looking for Digital Design Engineers with experience developing micro-architecture and implementation of the front-end circuit design, including RTL, synthesis, IP integration for high performance network controllers. The candidate is preferred to have knowledge of communication/interface protocols such as PCI-Express (Gen-3 and above), Ualink, Esun, Ethernet etc.

Basic Qualifications

• Strong academic and technical background in electrical engineering. A Bachelor’s degree in EE is required, and a Master’s degree is preferred.

• Professional attitude with the ability to prioritize a dynamic list of multiple tasks.

• Entrepreneurial, open-mind behavior and can-do attitude.

• Authorized to work in the US and start immediately.

Required Experience

• Hands-on, prefer knowledge of high-speed protocols like PCIe, Ualink, Esun, Ethernet, etc.

• Proven front end design skill – architecture, RTL, simulations and synthesis

• Experience with Synopsys and/or Cadence digital design tools/flows

• Knowledge of design for test (DFT)

• Familiarity with UVM based design verification

• Silicon bring-up and debug experience

Preferred Experience

• Scripting with Python or other equivalent programming languages.

• Development/support for PCIe or Ethernet Switch products.

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.