Senior Digital Design Engineer

NXP Semiconductors

Austin (TX)

On-site

USD 110,000 - 160,000

Full time

2 days ago
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Job summary

NXP Semiconductors in Austin, TX is seeking an IP design engineer to review architecture specifications, plan design, and deliver RTL IP with documentation, meeting quality and schedule targets.

You will collaborate with verification, SoC, and applications teams, develop test plans, achieve 100% coverage, and help integrate digital IP across subsystems and front-end design.

Qualifications

  • Expert knowledge of Verilog/RTL design.
  • Experience with design quality checks (Lint, CDC analysis, STA).
  • Familiarity with ARM AMBA bus protocol standards.
  • Knowledge of functional safety (ISO26262) a plus.
  • Knowledge of CPU/cache architecture a plus.
  • Experience with C coding a plus.
  • Scripting in Python or Perl a plus.

Responsibilities

  • Review IP architecture specifications, features and programming model, microarchitecture and interface specifications.
  • Plan IP documentation and design, including providing schedule assessments.
  • Design IP meeting requirements for quality and performance, using Verilog and SystemVerilog RTL.
  • Collaborate with verification team to develop test plans and reach 100% coverage.
  • Deliver completed IP including RTL design and supporting documentation.
  • Track metrics during IP development (milestones, coverage, defects, tracing).
  • Collaborate with cross-functional teams (subsystems, SoC, validation, applications) during product development.

Skills

Verilog RTL
Lint/CDC/STA
ARM AMBA protocols
Functional safety ISO26262 (a plus)
CPU/Cache architecture (a plus)
C coding (a plus)
Python/Perl scripting (a plus)

Education

BSEE/BSCE/BSCS

Job description

Business Unit Description

AI Chip Engineering Digital IP team defines and develops components for a wide range of products, including automotive microprocessors, application processors, microcontrollers, and networking. The Austin Digital IP team develops components for DDR, Display Controller, high-speed serial links, cores, memory controllers, and interconnect.

Job Summary

Review IP architecture specifications, features and programming model, microarchitecture and interface specifications. Plan IP documentation and design, including providing schedule assessments. Design IP meeting requirements for quality and performance, using Verilog and System Verilog RTL, and vendor and internal checking tools. Collaborate with verification team to develop test plans and complete verification execution to 100% coverage, and as per NXP standard quality and maturity standards. Deliver completed IP, including RTL design and supporting documentation Track metrics during IP development, include development plan milestones, code and functional coverage, defect tickets, and tracing of requirements versus design specification. Collaborate with cross-functional teams to provide expert support to subsystem, SoC, validation, and applications engineering teams during product development.

Key Challenges

Proving design meets all requirements and ensuring zero defects escape to silicon. Meeting committed schedules without compromising quality

Cross-functional Aspects

Definition reviews with architecture teams and designers Planning with verification team, architecture team, and project manager Integration of digital IP, working with local and global SoC front-end design teams Support for local customers on IP, subsystem and SoC verification teams, emulation and silicon validation teams Support for applications engineers and end-customers to replicate and identify root cause field failures, and identify workarounds. Collaborate with local and global verification and tools development teams in developing improved methods of verification

Job Qualifications
  • Minimum BSEE/BSCE/BSCS
  • Maximum 4 years of experience in IP or SoC design
  • Knowledge of SoC architecture required
  • Expert knowledge of Verilog required
  • Experience with design quality checks, including Lint, clock domain crossing (CDC) analysis, static timing analysis (STA)
  • Expert knowledge of ARM AMBA bus protocol standards desired
  • Knowledge of functional safety, including ISO26262 a plus
  • Knowledge of CPU or cache architecture a plus
  • Knowledge of C coding a plus
  • Knowledge of scripting, such as Perl or Python, a plus

More information about NXP in the United States... NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.

#LI-6692 NXP Semiconductors N.V. (NASDAQ: NXPI) enables a smarter, safer, and more sustainable world through innovation. As the world leader in secure connectivity solutions for embedded applications, NXP is pushing boundaries in the automotive, industrial & IoT, mobile, and communication infrastructure markets. For more information, visit www.nxp.com Bright Minds. Bright Futures. We believe that a key component to growing our business is to develop our people. To enable you to grow your career at NXP, we offer online and offline learning opportunities to help you develop some of your core and professional skills.

Commitment At NXP. We recognize NXP is a powerful change agent as we continue to deliver innovative solutions that advance a more sustainable future. We remain steadfast in our commitment to sustainability and making measurable year-on-year progress. Also, we aim to create an inclusive work environment and we will not tolerate racism, discrimination or harassment of any kind. We have programs in place focused on diversity, inclusion and equality.

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