Senior Data Converter IC Design Engineer (Remote)

Encore Semi Llc; Austin (TX); Remote; USD 150,000 - 180,000; Full time

Benefits offered by this job

15 days PTO

10 holidays

Medical benefits 80% premiums

Dental & Vision 50% premiums

401k - Traditional & Roth

Life/AD&D and LTD

Tuition reimbursement

EAP

Job summary

Encore Semi, Inc. seeks an experienced Analog/Mixed‑Signal IC Design Engineer to architect and tape out high‑speed data converters for HPC, AI, and communications in FinFET nodes from 7nm down to 3nm.

You own the full design cycle—from system architecture to post‑silicon validation—for next‑gen HPC, AI, and communications hardware. Lead multi‑GS/s ADC/DAC architectures, oversee layout, and drive calibration and model‑to‑hardware correlation, with a focus on meeting performance, power, and yield

Qualifications

• MS or PhD in Electrical Engineering or related field.
• 10+ years of hands-on high-speed data converter design and silicon tape-outs.

Responsibilities

• Architect multi‑GS/s ADC/DAC architectures (Time‑Interleaved SAR, Pipeline, Flash, RF‑DACs).
• Deliver transistor‑level circuits (track‑and‑hold, comparators, bias networks) in 7nm–3nm FinFET processes.
• Implement background/foreground digital calibration for offset, gain, timing skew, and linearity.
• Supervise layout to mitigate LDE, parasitics, electromigration, and self‑heating.
• Lead post‑silicon lab bring‑up, bench testing, and model‑to‑hardware correlation.

Skills

High-speed data converter design

FinFET design knowledge

Calibration and testing

Education

MS/PhD in Electrical Engineering

Tools

Cadence Virtuoso

Spectre/PrimeSim

Calibre PEX/Quantus

Job description

Encore Semi, Inc. seeks an experienced Analog/Mixed‑Signal IC Design Engineer to architect and tape out high‑speed data converters for HPC, AI, and communications in FinFET nodes from 7nm down to 3nm.

You own the full design cycle—from system architecture to post‑silicon validation—for next‑gen HPC, AI, and communications hardware. Lead multi‑GS/s ADC/DAC architectures, oversee layout, and drive calibration and model‑to‑hardware correlation, with a focus on meeting performance, power, and yield