Senior CPU Design Verification Lead

NUVACORE; Santa Clara (CA); On-site; USD 140,000 - 250,000; Full time

Job summary

NUVACORE is building a ground-up high performance, low-power CPU for next-generation compute workloads. As Design Verification Lead you will lead the team verifying functionality and correctness of the CPU design, and oversee pre-silicon verification as well as preparations for post-silicon verification.

You will guide DV efforts across test environments, regression, coverage, and test plans, mentoring engineers and driving best practices while ensuring high-quality design verification outcomes

Qualifications

• BS or MS with 15+ years in CPU verification.
• Understanding architecture and verification trade-offs.
• Experience with RISC-V, ARM64, or x86 ISA.
• Strong debugging and CPU troubleshooting skills.
• Experience in C, C++, SystemVerilog, scripting (Perl/Python).
• Experience mentoring DV engineers.

Responsibilities

• Lead DV team to verify CPU functionality and correctness.
• Develop test environments and regression results.
• Create unit and top level test stimuli and coverage.
• Develop golden models and checkers and testbench infrastructure.
• Triage issues and write detailed bug reports.
• Develop DV methodologies and best practices for the team.
• Test CPU performance against the performance model.
• Write tests in ASM, C, C++, or other languages.
• Utilize formal methods and emulation for high-performance testing.
• Verify gate-level design and leverage accelerated test environments.

Skills

C/C++

SystemVerilog

Debugging

Leadership

Python

Education

BS or MS in EE/CS

Tools

Emulation tools

Formal verification tools

Coverage tooling

Job description

NUVACORE is building a ground-up high performance, low-power CPU for next-generation compute workloads. As Design Verification Lead you will lead the team verifying functionality and correctness of the CPU design, and oversee pre-silicon verification as well as preparations for post-silicon verification.

You will guide DV efforts across test environments, regression, coverage, and test plans, mentoring engineers and driving best practices while ensuring high-quality design verification outcomes