Senior CMOS Backplane Test Engineer | R&D & Automation

Google LLC; Fremont (CA); Vor Ort; USD 159.000 - 230.000; Vollzeit

Zusammenfassung

Google's Raxium division seeks a Senior Test Engineer to design and scale CMOS backplane test solutions for microLED displays. You will work with wafer-level probes, test equipment, and software to diagnose issues and optimize test coverage in fast-moving production and R&D environments.

Applicants should have a strong background in CMOS, firmware concepts, and lab instrumentation, with experience in C/C++ and Python for test software, and a track record in semiconductor testing in both

Qualifikationen

• Bachelor degree in EE/CE/CS/Physics or equivalent practical experience.
• 4 years of experience with Silicon, CMOS, and IC test development.
• 3 years of experience with Silicon test hardware, software debugging and data analysis in R&D or manufacturing.

Aufgaben

• Develop, validate, optimize CMOS Backplane test solutions for microLED displays.
• Interface with wafer-level probe cards, test equipment, and instrumentation for CMOS/Silicon testing.
• Identify, diagnose, and resolve electrical issues during wafer-level testing with oscilloscopes.
• Collaborate with CMOS and panel test teams to implement high-speed automated testing for ICs and displays.
• Work with Reliability Team requirements to enhance test frameworks.

Kenntnisse

Silicon test development

Python

SQL databases

C/C++ bare metal

Ausbildung

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, Physics, or related fields

Master's degree or PhD in Electrical Engineering, Computer Engineering, Physics, or related field

Tools

Power supply

Current meter

Voltage meter

Digital meter

Spectrometer

Lab equipment

Jobbeschreibung

Google's Raxium division seeks a Senior Test Engineer to design and scale CMOS backplane test solutions for microLED displays. You will work with wafer-level probes, test equipment, and software to diagnose issues and optimize test coverage in fast-moving production and R&D environments.

Applicants should have a strong background in CMOS, firmware concepts, and lab instrumentation, with experience in C/C++ and Python for test software, and a track record in semiconductor testing in both