Senior CAD Engineer, Silicon, Google Cloud

Google LLC; Sunnyvale (CA); On-site; USD 163,000 - 236,000; Full time

Benefits offered by this job

Equity

Bonus target

Benefits

Job summary

Google LLC in Sunnyvale, CA is seeking a Senior Hardware Engineer to shape TPU design and verification for AI/ML acceleration. You will lead CAD methodology and collaborate across chip teams to deliver robust RTL and DV tooling for cutting-edge silicon.

The role emphasizes leadership in a fluid team environment, driving tool flow improvements and multi-area collaboration to enable first-time-right designs in TPUs and related AI hardware. English communication and cross-team impact are key.

Qualifications

• Requires a Bachelor’s degree in Electrical Engineering, Computer Science Engineering, or equivalent practical experience.
• At least 5 years experience with CAD and hardware design tools.
• Experience with SystemVerilog, hardware design, automation, and design verification testing.
• Experience developing tools in Python or C/C++.

Responsibilities

• Lead CAD methodology engineers to support chip RTL and DV teams.
• Collaborate with chip project teams to standardize methodology across areas and regions.
• Evaluate tools for potential deployment and use within flows.
• Work with Google teams to identify opportunities for improving chip design.
• Participate in design reviews and track issue resolution with trade-off discussions.

Skills

CAD

SystemVerilog

Hardware design

Automation

Design verification

Python

C/C++

Education

Bachelor's degree in Electrical Engineering, Computer Science Engineering, or equivalent

Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science or related field

Job description

corporate_fare Google place Sunnyvale, CA, USA

X In most instances, this position requires in-person interviews as part of the hiring process.

• Bachelor's degree in Electrical Engineering, Computer Science Engineering, or equivalent practical experience.
• 5 years of experience working with Computer-aided design (CAD).
• Experience with SystemVerilog, hardware design, automation, design verification test.
• Experience with developing tools in one or more programming languages such as Python or C/C++.

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science or a related field.
• Experience planning and deploying new tools and flows to users.
• Knowledge of the chip design process for design and verification.
• Ability to present and explain novel methods to users.
• Excellent automation of EDA flows using Python, AI, and related Software Engineering skills.

About the job

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

As a Senior Engineer within Google's Silicon team, you will help deliver products that have a substantive impact on the technical infrastructure that powers Google. You will provide leadership to a group of hardware engineers in a fluid environment with a focus on infrastructure for chip design. You will also lead the technical projects from the concept/planning stage through execution and closure. In this role, you will help your team deliver designs that work for the first time in a number of different application areas. Leveraging your technical and leadership expertise, you will lead the chip design process improvement projects in multiple areas of expertise.

The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting‑edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world‑leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.

Individual pay is determined by factors including job-related skills, experience, and relevant education or training.

US: $163000 - $236000 (USD) + 15% bonus target + equity + benefits

Learn more about benefits at Google .

• Lead CAD methodology engineers to provide support for chip RTL or Design Verification (DV) teams; and also manage and mitigate support issues for tool flows.
• Partner with chip project teams to influence and standardize methodology across functional areas and geography.
• Perform or guide technical evaluations of tools for possible deployment.
• Collaborate with teams across Google to identify and create opportunities for improved chip design across Google.
• Participate in design reviews and track issue resolution and engage in technical and schedule trade‑off discussions.

Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents‑to‑be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google's EEO Policy , Know your rights: workplace discrimination is illegal , Belonging at Google , and How we hire .

Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.

Equity is granted exclusively and discretionarily by Alphabet Inc. on the basis of an agreement concluded between you and Alphabet Inc. Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not guaranteed, are discretionary, the terms of the relevant Alphabet Inc. stock plan, and your grant agreement. They have no impact on statutory payments. Current or past grants do not confer an acquired right.