Senior CAD Engineer – Physical Verification

Micron Technology, Inc.; Boise (ID); Sur place; USD 120 000 - 180 000; Plein temps

Avantages offerts par ce poste

Medical, dental and vision plans

Paid time off

Paid holidays

Résumé du poste

Micron Technology, Inc. is seeking an experienced Verification Engineer to develop and maintain physical verification workflows for DRAM, HBM, NAND, and emerging memory products.

You will implement Calibre DRC/LVS decks using SVRF, translate design rules into checks, and define test and regression strategies. You will partner with cross-functional teams to define signoff strategies, mentor design teams on verification practices, and contribute to the verification roadmap.

Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or Computer Science, or equivalent.
• 5+ years of industry experience in CAD, EDA, or semiconductor design.
• Experience with DRC and LVS physical verification, IC layout, and process design rules.
• Ability to interpret design-rule requirements and resolve complex verification issues in production flows.
• Proficiency in Python and at least one additional language, such as SKILL, Tcl, Perl, C, or C++, plus Linux/Unix and shell scripting.
• Solid CMOS and VLSI fundamentals, with clear communication and practical debugging skills across global teams.

Responsabilités

• Develop and maintain physical verification tools, flows, and methodologies for DRAM, HBM, NAND, and emerging memory products.
• Develop, debug, qualify, and release Calibre DRC/LVS rule decks using SVRF.
• Translate process design rules into verification checks and define test cases and regression methods.
• Partner with process, design, layout, modeling, and verification teams to define signoff strategies and resolve verification issues.
• Guide design teams on verification methodologies, waivers, and debugging, and provide training and production support.
• Evaluate EDA technologies to improve verification quality, performance, and capacity.
• Automate verification setup, execution, and reporting, including AI-assisted analysis and debugging.
• Lead technical projects and contribute to the physical verification roadmap.

Connaissances

Python

Tcl

Perl

C++

Shell scripting

Linux/Unix

Debugging

Communication

CMOS fundamentals

VLSI fundamentals

Formation

Bachelors or Masters in Electrical/Computer Engineering or Computer Science

Outils

Calibre DRC/LVS

SVRF

nmDRC

nmLVS

RVE

Cadence Virtuoso

Description du poste

Responsibilities

• Develop and maintain physical verification tools, flows, and methodologies for DRAM, HBM, NAND, and emerging memory products.
• Develop, debug, qualify, and release Siemens Calibre design rule checking (DRC) and layout versus schematic (LVS) rule decks using Standard Verification Rule Format (SVRF).
• Translate process design rules into verification checks, and define the test cases, coverage criteria, and regression methods that qualify them.
• Partner with process, design, layout, modeling, and verification teams to define signoff strategies and resolve verification issues.
• Guide design teams on verification methodologies, waivers, and debugging, and provide training, documentation, and production support.
• Evaluate EDA technologies that improve verification quality, performance, and capacity.
• Automate verification setup, execution, and reporting, including AI-assisted analysis and debugging.
• Lead technical projects and contribute to the physical verification roadmap.

Minimum Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or Computer Science, or equivalent.
• 5+ years of industry experience in CAD, EDA, or semiconductor design.
• Experience with DRC and LVS physical verification, IC layout, and process design rules.
• Ability to interpret design-rule requirements and resolve complex verification issues in production flows.
• Proficiency in Python and at least one additional language, such as SKILL, Tcl, Perl, C, or C++, plus Linux/Unix and shell scripting.
• Solid CMOS and VLSI fundamentals, with clear communication and practical debugging skills across global teams.

Preferred Qualifications

• Experience developing and qualifying Calibre DRC and LVS rule decks in SVRF, using nmDRC, nmLVS, and Results Viewing Environment (RVE).
• Knowledge of layout-dependent effects and electrical rule checking (ERC), programmable ERC (PERC), antenna, and density checks.
• Experience optimizing rule-deck coverage, runtime, and memory use.
• Experience with Cadence Virtuoso, SKILL, or Cadence physical verification tools.
• Experience applying AI/ML, large language models, or agentic AI to engineering workflows.
• Experience with source control, automated testing, and release management.
• Knowledge of DRAM, HBM, NAND, or emerging memory development.

Micron Benefits

• We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget.
• Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave.
• Additionally, Micron benefits include a robust paid time-off program and paid holidays.

Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future.

For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits.

Equal Opportunity & Diversity

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

Application & Support Policies

Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.

Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.

To learn more about Micron, please visit micron.com/careers.

AI alert: Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification.

Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.