Senior CAD/EDA Enablement Engineer

Micron Technology, Inc.; Richardson, Northern (TX, KY); Hybrid; USD 120,000 - 180,000; Full time

Benefits offered by this job

Competitive benefits package

Paid time off

Job summary

Micron Technology, Inc. in Richardson, TX is seeking a skilled CAD Engineer to design, develop, and support CAD software and EDA tools for CMOS design and verification.

You will debug and optimize both in-house and commercial tools, and automate flows for physical design and tapeout. The role collaborates across design, process, and integration teams, with responsibilities spanning PDK development, scripting, and training end users.

Qualifications

• Bachelor’s degree in Computer Engineering, Computer Science, or related field.
• 2+ years of CAD/VLSI or related semiconductor engineering experience.
• Experience programming in SKILL/Skill++ (Cadence), Python, and/or Perl.
• Experience with PDK development/validation and Cadence EDA tools/flows.
• Experience with Linux/Unix, shell scripting, databases, and version control.
• Excellent communication and collaborative skills.

Responsibilities

• Design, develop, and support CAD software and EDA tools/flows for CMOS design and verification.
• Debug, evaluate, and support in-house and commercial EDA solutions in a production environment.
• Develop P-cells, scripts, and automation for physical design, verification, optimization, and tapeout.
• Collaborate with design, PI, and process teams to address workflow and tool challenges.
• Document processes and provide training and support for end users.

Skills

CAD software

VLSI design

Python

Perl

SKILL/Skill++

Linux/Unix

Shell scripting

Databases

Version control

Interpersonal communication

Education

Bachelor’s degree in Computer Engineering, Computer Science, or related field

Tools

Cadence EDA tools

PDK development/validation

Cadence SKILL

Job description

Micron Technology, Inc. in Richardson, TX is seeking a skilled CAD Engineer to design, develop, and support CAD software and EDA tools for CMOS design and verification.

You will debug and optimize both in-house and commercial tools, and automate flows for physical design and tapeout. The role collaborates across design, process, and integration teams, with responsibilities spanning PDK development, scripting, and training end users.