A leading tech company in California is seeking an experienced ASIC Verification Engineer to verify designs for their advanced inference accelerator. The role entails collaborating with cross-functional teams, developing verification infrastructure, and applying innovative methodologies. Ideal candidates should have a Bachelor's in EE, CS, or CE, along with 8+ years of experience in verification, strong skills in SystemVerilog and UVM, and familiarity with machine learning applications. Benefits include a competitive salary and equity options.
Qualifications
8+ years of relevant industry experience.
Experience in verification using random stimulus.
Knowledge of applying machine learning to ASIC verification flow.
Responsibilities
Verify the design and implementation of the inference accelerator.
Collaborate with architects and designers.
Implement and optimize automated verification flows.
Skills
SystemVerilog
UVM
Debugging and analytical skills
Perl/Python
C/C++ programming
ASIC design flow knowledge
Education
Bachelor's Degree in EE, CS or CE
Tools
VCS
Verdi
Job description
A leading tech company in California is seeking an experienced ASIC Verification Engineer to verify designs for their advanced inference accelerator. The role entails collaborating with cross-functional teams, developing verification infrastructure, and applying innovative methodologies. Ideal candidates should have a Bachelor's in EE, CS, or CE, along with 8+ years of experience in verification, strong skills in SystemVerilog and UVM, and familiarity with machine learning applications. Benefits include a competitive salary and equity options.