Senior ASIC Verification Engineer - GPU

Segment (Twilio); Santa Clara (CA); On-site; USD 136,000 - 218,500; Full time

Benefits offered by this job

Equity

Benefits

Job summary

NVIDIA is looking for an ASIC Verification Engineer to join their Santa Clara team. This role involves unit level verification of GPU hardware, collaborating across multiple teams including software and architecture. Applicants should possess a BS or MS degree and 5+ years of relevant experience, especially with SystemVerilog.

The base salary for this position ranges from 136,000 to 218,500 USD for Level 3, and from 168,000 to 264,500 USD for Level 4, alongside equity and benefits.

NVIDIA values diversity and is an equal opportunity employer.

Qualifications

• 5+ years of verification experience required.
• Strong understanding of ASIC design and verification methodology.
• Familiarity with object-oriented programming concepts essential.

Responsibilities

• Work on unit level verification testbench.
• Collaborate with RTL and architecture teams.
• Plan verification strategy for sub-system features.
• Support post-silicon validation activities.
• Leverage AI for automation and debugging tasks.

Skills

Verification experience

SystemVerilog

Computer Architecture

Debugging skills

Problem solving skills

Effective communication

Teamwork

Education

BS or MS in electrical/computer engineering

Tools

Perl

Python

Job description

NVIDIA is seeking best-in-class ASIC Verification Engineers to verify the world’s leading GPUs. In this role, you will be doing unit level verification of the process scheduling and system interface hardware of the GPU. This position will be working across many NVIDIA teams from software, to architecture, design, methodology, and more. The GPU is used in applications from consumer graphics, through self-driving cars, to artificial intelligence, all of which you will be involved in and learn about. We have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the methodology for verifying the future of computing.

What you’ll be doing:

• Work on a unit level testbench, working on directed and random tests and test infrastructure, and contributing to the future direction of the methodology for the testbench
• Partner closely with RTL and architecture teams to help refine the microarchitecture plans to ensure that changes to the design are verifiable
• Architect and plan the verification strategy and execution for sub-system features impacting your unit
• Support post‑silicon validation activities
• Harness cutting‑edge AI to accelerate testbench development, task automation, debugging and problem‑solving in a paradigm‑shifting way

What we need to see:

• BS or MS in electrical engineering or computer engineering or similar area (or equivalent experience)
• 5+ years of verification experience
• Exposure to Computer Architecture, ASIC design and verification methodology is required
• Strong ability with SystemVerilog, test planning, coverage closure, and test bench design
• Understanding of object‑oriented programming concepts
• Strong communication skills.
• Ability and desire to work as a great teammate
• Good debugging and problem solving skills

Ways to stand out from the crowd:

• Experience with assertion‑based verification, Semiformal Verification (SFV), Unified Verification Methodology (UVM), SystemVerilog checkers and scoreboards.
• Perl or Python knowledge
• Experience with multiple verification methodologies
• Leadership experience

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4.

You will also be eligible for equity and benefits.

NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.