Senior ASIC Physical Verification Engineer

Amazon Web Services (AWS); Austin (TX); On-site; USD 159,200 - 215,300; Full time

Benefits offered by this job

Health insurance

401(k) matching

Paid time off

Parental leave

Job summary

Annapurna Labs (our organization within AWS Utility Computing) designs silicon and software that accelerates innovation. We are seeking an ASIC Physical Design Integration and Verification Engineer to join our backend team in Austin.

You will ensure quality and manufacturability of complex semiconductor designs through physical verification, collaborating with layout and design teams to meet sign-off milestones.

Qualifications

• Experience in Python, Perl, or another scripting language.
• 5+ years in physical verification for advanced technology nodes.
• Expert knowledge of Calibre, IC Validator and PVS for physical verification.
• Strong understanding of semiconductor manufacturing processes and design rules.
• Proven track record of successful tape-outs.
• Strong communication and collaboration abilities.
• Design Flow Knowledge: backend physical design flows (FC/Innovus).

Responsibilities

• Drive full chip floorplan, integration and physical verification sign-off and closure.
• Define, execute and optimize physical verification methodologies using industry-standard tools.
• Perform DRC, LVS, PERC verification, and Fill insertion.
• Debug and resolve physical verification issues with layout and design teams.
• Interface with foundries for MT form, rule deck updates and violation waivers.
• Develop and maintain verification runsets and methodologies.
• Support technology file development and qualification.
• Fine tune cloud infrastructure to improve compute and storage for physical design.
• Mentor junior engineers on physical verification methodologies and closure.

Skills

Python/Perl scripting

Backend physical design flows (FC/Inv?

Education

BS + 10yrs or MS + 7yrs in EE/CS

Tools

Calibre

IC Validator

PVS

Job description

Annapurna Labs (our organization within AWS Utility Computing) designs silicon and software that accelerates innovation. We are seeking an ASIC Physical Design Integration and Verification Engineer to join our backend team in Austin.

You will ensure quality and manufacturability of complex semiconductor designs through physical verification, collaborating with layout and design teams to meet sign-off milestones.