Senior ASIC/FPGA Design Engineer - Onsite (DoD Secret)

Raytheon; McKinney (TX); On-site; USD 86,800 - 165,200; Full time

Benefits offered by this job

Medical

Dental

Vision

Life insurance

Short-term disability

Long-term disability

401(k) match

Flexible spending accounts

Flexible work schedules

Employee assistance program

Employee Scholar Program

Parental leave

Paid time off

Holidays

Job summary

Raytheon in McKinney, TX seeks an experienced FPGA/ASIC design professional to define requirements, develop digital architectures, implement RTL, and perform timing, power, and functional analysis.

You will integrate FPGA modules in a lab, verify with industry tools, and collaborate across engineering teams while adhering to established processes. This onsite role requires US citizenship and security clearance.

Qualifications

• Bachelor of Science in a STEM field.
• 5+ years in FPGA/ASIC design, RTL development, and verification.
• Experience with Xilinx/Altera FPGAs or related devices.
• Experience with digital design and high‑speed interfaces (PCI/PCIe, VPX, Gb Ethernet).
• Experience with debugging and scripting (Python, Perl, Shell).
• Ability to obtain and maintain a U.S. government security clearance; U.S. citizenship required.

Responsibilities

• Define ASIC/FPGA requirements from system specifications, develop digital architectures, implement RTL designs.
• Integrate and verify FPGA modules in a lab environment using industry‑standard simulation, emulation, and hardware test tools.
• Work closely with cross‑functional engineering teams, support design reviews and documentation, and follow established development processes.
• This is an onsite role based in McKinney, TX.

Skills

FPGA/ASIC design

RTL development

Verification

Xilinx/Altera FPGAs

Digital design

High-speed interfaces

Scripting (Python, Perl, Shell)

Security clearance

Education

Bachelor of Science in STEM

Job description

Raytheon in McKinney, TX seeks an experienced FPGA/ASIC design professional to define requirements, develop digital architectures, implement RTL, and perform timing, power, and functional analysis.

You will integrate FPGA modules in a lab, verify with industry tools, and collaborate across engineering teams while adhering to established processes. This onsite role requires US citizenship and security clearance.