Senior ASIC Design Verification Engineer - Terawave

Blue Origin

San Francisco (CA)

On-site

USD 197,529 - 276,539

Full time

14 days+
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Benefits offered by this job

Medical, dental, vision insurance
Paid parental leave
401(k) with company match

Job summary

BLUE ORIGIN is seeking an experienced engineer to lead verification efforts in San Francisco. The role involves developing and executing verification plans, creating UVM environments, and mentoring junior engineers. Applicants should have a strong background in System Verilog and ASIC verification, with 5-8+ years of experience required. Competitive compensation and comprehensive benefits including medical, dental, and a 401(k) plan are offered.

Qualifications

  • 5–8+ years of ASIC/SoC verification experience.
  • Deep hands‑on expertise in System Verilog and UVM.
  • Strong understanding of verification planning, assertions, and coverage closure.

Responsibilities

  • Lead verification planning and execution for complex blocks or subsystems.
  • Develop sophisticated UVM environments and verification strategies.
  • Mentor junior engineers in verification standard processes.

Skills

System Verilog
UVM
ASIC/SoC verification
Debugging
Collaboration

Education

BS or MS in Electrical Engineering, Computer Engineering, or related field

Job description

At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion. Join our team of problem solvers as we add new chapters to the history of spaceflight!

Responsibilities
  • Lead verification planning and execution for complex blocks or subsystems.
  • Develop sophisticated UVM environments, reference models, scoreboards, protocol monitors, and assertions.
  • Translate architecture and design specifications into comprehensive verification strategies and measurable coverage goals.
  • Drive functional coverage closure, regression health, and verification signoff readiness.
  • Identify verification gaps, corner cases, and high-risk scenarios early in the development cycle.
  • Collaborate closely with design, systems, DFT, firmware, and physical design teams.
  • Review testbench architecture, stimulus quality, and debug methodologies for technical excellence.
  • Mentor junior engineers in verification standard processes.
  • Support bring-up, emulation, prototyping, and post-silicon debug activities as needed.
Minimum Qualifications
  • BS or MS in Electrical Engineering, Computer Engineering, or related field.
  • 5–8+ years of ASIC/SoC verification experience.
  • Deep hands‑on expertise in System Verilog and UVM.
  • Strong understanding of verification planning, assertions, and coverage closure.
  • Experience verifying complex digital control and datapath logic.
  • Proven debugging capability across RTL, testbench, and system interactions.
  • Ability to work effectively across multidisciplinary engineering teams.
Preferred Qualifications
  • Background in Space based communications, wireless communications, or modem/baseband hardware.
  • Experience verifying LDPC/BCH/FEC blocks, framing engines, beamforming logic, or DSP pipelines.
  • Familiarity with formal verification tools and methodologies.
  • Experience with low‑power verification, CDC/RDC verification, or reset‑domain behavior.
  • Knowledge of high‑speed interface verification and hardware/software interactions.

Compensation Range: CA applicants $197,529.00 - $276,539.55; WA applicants $197,529.00 - $276,539.55. Other site ranges may differ.

Benefits
  • Benefits include: Medical, dental, vision, basic and supplemental life insurance, paid parental leave, short and long‑term disability, 401(k) with a company match of up to 5%, and an Education Support Program.
  • Paid Time Off: Up to four (4) weeks per year based on weekly scheduled hours, and up to 14 company‑paid holidays.
  • Dependent on role type and job level, employees may be eligible for benefits and bonuses based on the company's intent to reward individual contributions and enable them to share in the company's results, or other factors at the company's sole discretion. Bonus amounts and eligibility are not guaranteed and subject to change and cancellation. Please check with your recruiter for more details.
Equal Employment Opportunity

Blue Origin is proud to be an Equal Opportunity/Affirmative Action Employer and is committed to attracting, retaining, and developing a highly qualified and dedicated work force. Blue Origin hires and promotes people on the basis of their qualifications, performance, and abilities. We support the establishment and maintenance of a workplace that fosters trust, equality, and teamwork. We provide all qualified applicants for employment and employees with equal opportunities for hire, promotion, and other terms and conditions of employment, regardless of their race, color, religion, sex, sexual orientation, gender identity, national origin/ethnicity, age, physical or mental disability, genetic factors, military/veteran status, or any other status or characteristic protected by federal, state, and/or local law. Blue Origin will consider for employment qualified applicants with criminal histories in a manner consistent with applicable federal, state, and local laws, including the Washington Fair Chance Act, the California Fair Chance Act, the Los Angeles Fair Chance in Hiring Ordinance, and other applicable laws. For more information on "Know Your Rights", please see here.

Affirmative Action and Disability Accommodation

Applicants wishing to receive information on Blue Origin's Affi... or applicants requiring a reasonable accommodation in order to participate in the application and/or interview process, please contact us at EEOCompliance@blueorigin.com. Please note this is a publicly managed inbox. Please do not include any personal medical information in your request.

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