Senior ASIC Design Engineer - Terawave

Blue Origin; Central (TX); On-site; USD 230,398 - 322,556; Full time

Benefits offered by this job

Medical, dental, vision insurance

Paid Time Off

Stock Options

Job summary

Blue Origin is seeking ASIC/SOC Design Validation engineers, including Senior and Principal levels, to ensure the validation of innovative integrated circuits. This role involves verifying complex designs through various methodologies and supporting post-silicon environments.

The ideal candidate has a BS or MS in Electrical Engineering and over 8 years of experience in verification processes. Locations include Texas and California with a competitive compensation package.

Qualifications

• 8+ years of experience in innovative verification flows.
• Deep working knowledge and hands-on experience.
• Ability to support post-silicon and FPGA environments.

Responsibilities

• Verify RFIC/ASIC designs to ensure they meet requirements.
• Conduct advanced verification tasks using various methodologies.
• Engage in post-silicon support to debug and test designs.

Skills

System Verilog experience

Formal verification

Functional coverage definition

Post silicon bring-up

Power estimation

Education

BS or MS in Electrical Engineering

Tools

MATLAB

C

SystemC

Job description

About the Role

We are seeking ASIC/SOC Design Validation engineers (all levels including Senior, Principal, Senior Principal) to work in the Design Validation team critical to ensuring our RFIC/ASIC designs culminate in thoroughly validated cutting‑edge integrated circuits that drive Blue Origin's mission of enabling millions to live and work in space for the benefit of Earth.

Location

San Diego, CA; Bay Area, CA; Austin, TX; Kent, WA.

Responsibilities

• System Verilog experience in verifying complex SOCs
• Formal verification
• Functional coverage definition and collection
• Module verification
• Complex subsystem verification
• Complex SoC verification
• Co‑simulation with software, integration of software build tool flow with simulation
• Test planning and tracking, coverage closure
• Methodology and flow definition and implementation
• Power estimation
• Gate simulation
• Performance analysis
• External IP integration
• AXI bus architecture
• High performance NOC and DMA
• DDR, PCIE, Ethernet, SPI
• High speed SERDES
• DSP structures (FIR, Cordic, FFT/IFFT, MAC, circular buffers, analog‑digital interface)
• Modern modem SOCs using innovative DSP, coding, framing (PHY and MAC)
• Sequenced and time‑bound data movement in DSP structures (time slots, time stamps, etc.)
• AMS verification
• SOC top‑level verification using models for analog macros
• Verification using golden reference models in MATLAB, SystemC or C
• Code coverage
• Emulators: qualification for release, compatibility of test cases, reproduce and debug failures, partition verification and assess coverage between this and simulation
• Portable verification across block level and top level, FPGA and ASIC, RTL and gate, pre‑silicon and silicon/prototyping (lab bring‑up and test): common method for configuring, stimulus, checking, reusability across environments, efficient methods for doing this

Post‑Silicon

• Post silicon bring‑up
• Support for post‑silicon and FPGA in the same pre‑silicon environment (portable bench/sim platforms). Compatibility of test cases, reproduce and debug failures, accelerate software development

FPGA

• ASIC to/from FPGA flow
• Prototyping: qualification for release, different design configurations and top levels, compatibility of test cases, reproduce and debug failures, accelerate software development, partition verification and assess coverage between this and simulation

Minimum Qualifications

• BS or MS in Electrical Engineering or a related technical field.
• 8+ years of experience.
• Deep working knowledge and hands‑on experience in innovative verification flows.

Compensation

Base Pay Range for CA applicants is $230,398.00 – $322,556.85. WA applicants: $230,398.00 – $322,556.85. Other site ranges may differ.

Benefits

• Medical, dental, vision, basic and supplemental life insurance, paid parental leave, short and long‑term disability, 401(k) with a company match of up to 5%, and an Education Support Program.
• Stock Options for all regular employees (working at least 20 hours/week).
• Paid Time Off: Up to four (4) weeks per year based on weekly scheduled hours, and up to 14 company‑paid holidays.
• Dependent on role type and job level, eligibility for bonuses and other benefits is at the company’s sole discretion and may be subject to change.

Equal Employment Opportunity

Blue Origin is proud to be an Equal Opportunity/Affirmative Action Employer and is committed to attracting, retaining, and developing a highly qualified and dedicated workforce. We hire and promote people on the basis of their qualifications, performance, and abilities. We support a workplace that fosters trust, equality, and teamwork. Qualified applicants have equal opportunities for hire, promotion, and other terms and conditions of employment, regardless of their race, color, religion, sex, sexual orientation, gender identity, national origin, age, physical or mental disability, genetic factors, military/veteran status, or any other protected characteristic. We will consider applicants with criminal histories in a manner consistent with applicable federal, state, and local laws.

Applicants wishing to receive information on Blue Origin’s affirmative action plans, or requiring a reasonable accommodation in the application or interview process, may contact [e-mail]. Please do not provide personal medical information in that email.