Senior Analog & RF IC Layout Engineer

Keysight Technologies; Santa Clara (CA); On-site; USD 117,530 - 195,880; Full time

Benefits offered by this job

Medical, dental and vision

401(k) Plan

Flexible Time Off

Tuition Reimbursement

Job summary

Keysight Technologies is seeking an experienced Analog Layout Engineer in Santa Clara, California. This role involves supporting ASIC/MMIC design by laying out custom BiCMOS and CMOS ICs. Candidates should have at least 7 years of layout experience, and a strong knowledge of Cadence tools is essential.

The position offers a salary ranging from $117,530 to $195,880 and includes various benefits such as medical insurance, 401(k), and flexible time off.

Qualifications

• 7+ years of custom Analog IC Layout experience.
• 5+ years of experience with Cadence layout tools including full-chip DRC.
• Familiarity with analog design in sub-micron BiCMOS technology.

Responsibilities

• Create transistor level layout views from schematics.
• Complete Design Rule Checking (DRC) and Layout-vs-Schematic (LVS) verifications.
• Coordinate layout activities with other engineers.

Skills

Custom Analog IC Layout

Cadence Virtuoso Layout XL

Teamwork and Collaboration

Communication Skills

Version Control Systems

Education

BS/MS in Electrical Engineering

Tools

Cadence Virtuoso

Mentor Calibre DRC / LVS

Job description

Keysight Technologies is seeking an experienced Analog Layout Engineer in Santa Clara, California. This role involves supporting ASIC/MMIC design by laying out custom BiCMOS and CMOS ICs. Candidates should have at least 7 years of layout experience, and a strong knowledge of Cadence tools is essential.

The position offers a salary ranging from $117,530 to $195,880 and includes various benefits such as medical insurance, 401(k), and flexible time off.