Senior Analog & Mixed-Signal IC Architect

Phizenix; Irvine (CA); On-site; USD 140,000 - 200,000; Full time

Job summary

Phizenix is seeking a highly experienced Senior or Staff Analog/Mixed-Signal IC Designer to join its world-class semiconductor team in California. The role centers on high-speed analog circuit design for data communications, wireless, and compute applications, with ownership from concept through tape-out.

You will design and verify ADCs, DACs, PLLs, TIAs, and SerDes front-ends, develop transistor‑level layouts in FinFET or SOI processes, mentor junior designers, and collaborate with digital/CAD

Qualifications

• Ph.D. in Electrical Engineering with 6+ years of analog/mixed-signal IC design experience.
• MS in Electrical Engineering with 8+ years of analog/mixed-signal IC design experience.

Responsibilities

• Design and verify high-speed analog and mixed-signal circuits such as ADCs, DACs, PLLs and TIAs.
• Architect wireline SerDes front-ends and multi-GHz analog signal chains from concept to tape-out.
• Develop transistor-level schematics and layouts in FinFET or SOI processes.
• Drive pre-silicon simulations and post-silicon bring-up with measured data.
• Collaborate with digital, CAD, and systems teams to define mixed-signal interfaces.
• Produce design documentation and present progress to stakeholders.
• Mentor junior designers and contribute to best-practice development.

Skills

Analog / high-speed IC design

High-speed transceivers

TIAs (transimpedance amplifiers)

RF front-end design

Circuit verification

Mentoring

Education

PhD in Electrical Engineering

MS in Electrical Engineering

Tools

Cadence Virtuoso

Spectre / APS / Ultrasim

EM tools (EMX, PeakView)

Job description

Phizenix is seeking a highly experienced Senior or Staff Analog/Mixed-Signal IC Designer to join its world-class semiconductor team in California. The role centers on high-speed analog circuit design for data communications, wireless, and compute applications, with ownership from concept through tape-out.

You will design and verify ADCs, DACs, PLLs, TIAs, and SerDes front-ends, develop transistor‑level layouts in FinFET or SOI processes, mentor junior designers, and collaborate with digital/CAD