Senior Analog IC Design Engineer: Ultra-Low Power & Mixed-Signal

Anysilicon; Seattle (WA); Hybrid; USD 140,000 - 190,000; Full time

Job summary

WaveWorks Technologies Inc in Seattle is seeking an experienced analog IC design engineer to contribute to innovative low-power solutions for connected devices.

You will design ultra-low-power analog/mixed-signal blocks, define power domains, and develop SystemVerilog/Verilog-AMS models while collaborating with digital and verification teams.

Responsibilities include silicon characterization, tapeout-ready designs, and close collaboration with layout engineers to optimize performance.

Qualifications

• BS in Electrical Engineering with 5+ years of analog IC design experience; MS with 3+ years or PhD.
• Experience taking analog blocks through tapeout in a CMOS process and silicon bring-up.
• Proficiency with Cadence Virtuoso/Spectre and corner/Monte Carlo analyses; Verilog-AMS and SystemVerilog simulations.

Responsibilities

• Design ultra-low-power analog and mixed-signal blocks including bias and reference generation, LDOs, oscillators, and control loops.
• Manage design at nanoamp bias currents, addressing leakage, noise, offset, and mismatch across conditions.
• Define power domains and management strategies for energy-efficient operation of each block.
• Develop SystemVerilog and Verilog-AMS models for analog blocks and perform mixed-signal simulations with digital designs.
• Oversee layout to minimize leakage and ensure matching; review parasitic-extracted results.
• Characterize silicon in the lab and correlate measurements with simulations for future revisions.

Skills

Analog IC design

Mixed-signal design

SystemVerilog

Power management

Education

BS in Electrical Engineering

MS in Electrical Engineering

PhD in Electrical Engineering

Tools

Cadence Virtuoso

Spectre

Verilog-AMS

SystemVerilog

Job description

WaveWorks Technologies Inc in Seattle is seeking an experienced analog IC design engineer to contribute to innovative low-power solutions for connected devices.

You will design ultra-low-power analog/mixed-signal blocks, define power domains, and develop SystemVerilog/Verilog-AMS models while collaborating with digital and verification teams.

Responsibilities include silicon characterization, tapeout-ready designs, and close collaboration with layout engineers to optimize performance.