Senior AMS Design Verification Lead

null

Santa Clara (CA)

On-site

USD 162,000 - 289,000

Full time

14 days+
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Job summary

Texas Instruments is seeking a Design Verification Manager in Santa Clara, CA. You will direct a verification team from definition through release to manufacturing, while collaborating with cross-functional teams and customers on custom chips.

The role requires senior expertise in AMS verification, SystemVerilog, and analog/mixed-signal methodologies, with a focus on leadership and mentoring to deliver high-quality results.

Qualifications

  • Bachelor's degree in Electrical Engineering or related field.
  • 5+ years of AMS verification experience.
  • Experience with SystemVerilog, Verilog-A/Verilog-AMS in semiconductor DV.
  • Experience with analog regressions in ADE-L/ADE-XL or Maestro.

Responsibilities

  • Manage an AMS Design Verification team with execution ownership from definition to release to manufacturing.
  • Participate in hiring, developing and evaluating personnel to ensure efficient operation and growth of the team.
  • Drive accountability and execution excellence within the team.
  • Mentor the team and drive increasing capabilities and performance.
  • Allocate work, develop schedules and monitor progress across projects.
  • Collaborate with cross-functional teams to enable successful product execution to production.
  • Act as verification subject matter expert for interfacing with customers for custom chips.
  • Drive innovation and excellence in verification methodologies across TI.

Skills

AMS verification
SystemVerilog
Verilog-A/Verilog-AMS
Analog mixed-signal
Leadership

Education

Bachelor's degree in Electrical Engineering or related field

Tools

ADE-L/ADE-XL
Maestro
Verilog AMS

Job description

Texas Instruments is seeking a Design Verification Manager in Santa Clara, CA. You will direct a verification team from definition through release to manufacturing, while collaborating with cross-functional teams and customers on custom chips.

The role requires senior expertise in AMS verification, SystemVerilog, and analog/mixed-signal methodologies, with a focus on leadership and mentoring to deliver high-quality results.

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