Senior AI SoC Architect — Lead Next-Gen Server Silicon

MatX Inc.; Mountain View (CA); Hybrid; USD 120,000 - 600,000; Full time

Benefits offered by this job

Time off

Health benefits

Professional development budget

Team meals

Commute reimbursement

Mental wellbeing support

Parental leave

Job summary

MatX Inc. is seeking an experienced SoC Architect to lead the design of next-generation AI-focused server-class silicon in a hybrid Mountain View office role. You will translate product requirements into robust architectures, define memory and interconnect systems, and own PPA trade-offs with implementation teams.

The position demands strong documentation skills and collaboration across hardware, software, and third-party IP teams, with hybrid work Tue-Thu in Mountain View, CA.

Qualifications

• Industry experience in complex SoC architectures.
• Knowledge of memory systems and interconnect fabrics.
• Ability to define functional and PPA requirements from use cases.
• Sound architectural judgment in driving trade-off decisions.
• Excellent technical communication, documentation, and organizational skills.
• Experience collaborating across hardware, software, and third-party IP teams.

Responsibilities

• Lead SoC architecture by translating PRDs into SoC-level architectures.
• Define architecture including memory, systems, interconnects, clocking, power, IP requirements, and system integration.
• Define system flows for power-up, boot, and recovery.
• Own PPA feasibility and drive power, performance, and area trade-offs with implementation teams.
• Own architectural specifications and documentation from definition through productization.

Skills

SoC architectures

Memory systems

PPA requirements

Architectural judgment

Technical communication

Cross-functional collaboration

Verilog/Bash/C/C++/Python

Job description

MatX Inc. is seeking an experienced SoC Architect to lead the design of next-generation AI-focused server-class silicon in a hybrid Mountain View office role. You will translate product requirements into robust architectures, define memory and interconnect systems, and own PPA trade-offs with implementation teams.

The position demands strong documentation skills and collaboration across hardware, software, and third-party IP teams, with hybrid work Tue-Thu in Mountain View, CA.