Senior AI/ML Logic Design Engineer — RTL & NPU

Qualcomm; Austin (TX); On-site; USD 127,200 - 190,800; Full time

Job summary

Qualcomm Technologies, Inc. seeks a design-focused engineer to contribute to the next generation of Hexagon NPU microarchitecture and logic. You will drive RTL in SystemVerilog, perform early synthesis and power estimation, and collaborate with architects to evaluate design feasibility across ISA to tape-out.

This role demands strong SystemVerilog, AI/ML concepts, and scripting skills; you will work in a fast-paced team in Austin, with competitive pay and comprehensive benefits.

Qualifications

• Bachelor’s degree in EE/CS/CE or related field with 2+ years of relevant work experience.
• Master’s degree in EE/CS/CE or related field with 1+ year of relevant work experience.
• PhD in EE/CS/CE or related field.
• 2+ years of experience with high-performance microprocessor design.

Responsibilities

• Collaborate with architects to define microarchitectures for Hexagon NPU generations.
• Drive RTL design in SystemVerilog from concept to tape-out.
• Perform early logic synthesis, STA, and power estimation to validate design choices.
• Evaluate end-to-end design pipeline from ISA to RTL and synthesis feasibility.
• Utilize standard EDA tools for simulation, synthesis, and power/performance analysis.
• Debug and optimize EDA tool flows to improve iteration efficiency.

Skills

SystemVerilog

RTL design

AI/ML concepts

Python

Perl

shell scripting

Git

communication

cross-functional collaboration

independent work

Education

Bachelor’s degree in Electrical Engineering, Computer Science, Computer Engineering, or related field

Master’s degree in Electrical Engineering, Computer Science, Computer Engineering, or related field

PhD in Electrical Engineering, Computer Science, Computer Engineering, or related field

2+ years of experience with high-performance microprocessor design

Job description

Qualcomm Technologies, Inc. seeks a design-focused engineer to contribute to the next generation of Hexagon NPU microarchitecture and logic. You will drive RTL in SystemVerilog, perform early synthesis and power estimation, and collaborate with architects to evaluate design feasibility across ISA to tape-out.

This role demands strong SystemVerilog, AI/ML concepts, and scripting skills; you will work in a fast-paced team in Austin, with competitive pay and comprehensive benefits.