RTL Microarchitecture Engineer for AI/CPU Cores

QUALCOMM, Inc.; Austin (TX); On-site; USD 101,000 - 152,000; Full time

Job summary

Qualcomm Technologies, Inc. is seeking a motivated RTL engineer to join the Hexagon processor microarchitecture team in Austin. You will contribute to the design and development of next-generation AI and modem cores, helping shape energy-efficient, high-performance solutions for AI workloads.

You will collaborate with architecture, verification, and software teams to optimize PPA and ensure hardware-software co-optimization for neural network inference, delivering production-quality RTL.

Qualifications

• Bachelor’s degree in Science, Engineering, or related field.
• Master’s degree in Computer Engineering, Electrical Engineering, or related field
• 1+ years of experience in Processor architecture or RTL design
• Strong understanding of CPU microarchitecture and ISA guidance

Responsibilities

• Own and drive RTL design and microarchitecture development for high-performance, low-power CPU and AI cores.
• Collaborate with architecture, verification, physical design, and software teams to deliver production-quality RTL.
• Contribute to performance, power, and area (PPA) optimization, including clock gating, power domains, and low-power techniques.
• Analyze and resolve timing, area, and functional issues across the design cycle.
• Apply knowledge of instruction set architecture (ISA) to guide microarchitecture decisions and support AI and signal processing workloads.
• Work closely with AI software and compiler teams to ensure hardware-software co-optimization for neural network inference.

Skills

RTL design

Verilog/SystemVerilog

CPU microarchitecture

Low-power design

AI accelerators/NPUs

Collaboration

Education

Master’s degree in Computer Engineering / Electrical Engineering

Bachelor’s degree in Science/Engineering

Tools

Synthesis tools

Job description

Qualcomm Technologies, Inc. is seeking a motivated RTL engineer to join the Hexagon processor microarchitecture team in Austin. You will contribute to the design and development of next-generation AI and modem cores, helping shape energy-efficient, high-performance solutions for AI workloads.

You will collaborate with architecture, verification, and software teams to optimize PPA and ensure hardware-software co-optimization for neural network inference, delivering production-quality RTL.